e605ecd7c8
Patch from Deepak Saxena None of the board-specific map_io routines do anything, so kill them. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
149 lines
3.8 KiB
C
149 lines
3.8 KiB
C
/*
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* arch/arm/mach-ixp4xx/gtwx5715-setup.c
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*
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* Gemtek GTWX5715 (Linksys WRV54G) board settup
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*
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* Copyright (C) 2004 George T. Joseph
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* Derived from Coyote
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/arch/gtwx5715.h>
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/*
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* Xscale UART registers are 32 bits wide with only the least
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* significant 8 bits having any meaning. From a configuration
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* perspective, this means 2 things...
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*
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* Setting .regshift = 2 so that the standard 16550 registers
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* line up on every 4th byte.
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*
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* Shifting the register start virtual address +3 bytes when
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* compiled big-endian. Since register writes are done on a
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* single byte basis, if the shift isn't done the driver will
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* write the value into the most significant byte of the register,
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* which is ignored, instead of the least significant.
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*/
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#ifdef __ARMEB__
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#define REG_OFFSET 3
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#else
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#define REG_OFFSET 0
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#endif
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/*
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* Only the second or "console" uart is connected on the gtwx5715.
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*/
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static struct resource gtwx5715_uart_resources[] = {
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_IXP4XX_UART2,
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.end = IRQ_IXP4XX_UART2,
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.flags = IORESOURCE_IRQ,
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},
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{ },
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};
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static struct plat_serial8250_port gtwx5715_uart_platform_data[] = {
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ },
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};
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static struct platform_device gtwx5715_uart_device = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = gtwx5715_uart_platform_data,
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},
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.num_resources = 2,
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.resource = gtwx5715_uart_resources,
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};
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static struct flash_platform_data gtwx5715_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource gtwx5715_flash_resource = {
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.start = GTWX5715_FLASH_BASE,
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.end = GTWX5715_FLASH_BASE + GTWX5715_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device gtwx5715_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev = {
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.platform_data = >wx5715_flash_data,
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},
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.num_resources = 1,
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.resource = >wx5715_flash_resource,
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};
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static struct platform_device *gtwx5715_devices[] __initdata = {
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>wx5715_uart_device,
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>wx5715_flash,
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};
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static void __init gtwx5715_init(void)
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{
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platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices));
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}
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MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
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/* Maintainer: George Joseph */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_UART2_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixp4xx_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = gtwx5715_init,
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MACHINE_END
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