e9b72e43d9
Patch from Lennert Buytenhek Switch the users of ixp2000_reg_write that depend on writes being flushed out of the write buffer by the time that function returns over to ixp2000_reg_wrb. When using XCB=101, writes to the same functional unit are still guaranteed to complete in order, so we only need to protect against: - reordering of writes to different functional units - masking an interrupt and then reenabling the IRQ bit in CPSR Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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debug-macro.S | ||
dma.h | ||
enp2611.h | ||
entry-macro.S | ||
gpio.h | ||
hardware.h | ||
io.h | ||
irq.h | ||
irqs.h | ||
ixdp2x00.h | ||
ixdp2x01.h | ||
ixp2000-regs.h | ||
memory.h | ||
param.h | ||
platform.h | ||
system.h | ||
timex.h | ||
uncompress.h | ||
vmalloc.h |