d27554d874
Documentation about PAT related interfaces, intended usage and memory attribute relationship. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
101 lines
5.6 KiB
Plaintext
101 lines
5.6 KiB
Plaintext
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PAT (Page Attribute Table)
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x86 Page Attribute Table (PAT) allows for setting the memory attribute at the
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page level granularity. PAT is complementary to the MTRR settings which allows
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for setting of memory types over physical address ranges. However, PAT is
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more flexible than MTRR due to its capability to set attributes at page level
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and also due to the fact that there are no hardware limitations on number of
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such attribute settings allowed. Added flexibility comes with guidelines for
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not having memory type aliasing for the same physical memory with multiple
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virtual addresses.
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PAT allows for different types of memory attributes. The most commonly used
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ones that will be supported at this time are Write-back, Uncached,
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Write-combined and Uncached Minus.
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There are many different APIs in the kernel that allows setting of memory
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attributes at the page level. In order to avoid aliasing, these interfaces
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should be used thoughtfully. Below is a table of interfaces available,
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their intended usage and their memory attribute relationships. Internally,
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these APIs use a reserve_memtype()/free_memtype() interface on the physical
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address range to avoid any aliasing.
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-------------------------------------------------------------------
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API | RAM | ACPI,... | Reserved/Holes |
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-----------------------|----------|------------|------------------|
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ioremap | -- | UC | UC |
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ioremap_cache | -- | WB | WB |
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ioremap_nocache | -- | UC | UC |
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ioremap_wc | -- | -- | WC |
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set_memory_uc | UC | -- | -- |
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set_memory_wb | | | |
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set_memory_wc | WC | -- | -- |
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set_memory_wb | | | |
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pci sysfs resource | -- | -- | UC |
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pci sysfs resource_wc | -- | -- | WC |
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is IORESOURCE_PREFETCH| | | |
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pci proc | -- | -- | UC |
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!PCIIOC_WRITE_COMBINE | | | |
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pci proc | -- | -- | WC |
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PCIIOC_WRITE_COMBINE | | | |
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/dev/mem | -- | UC | UC |
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read-write | | | |
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/dev/mem | -- | UC | UC |
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mmap SYNC flag | | | |
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/dev/mem | -- | WB/WC/UC | WB/WC/UC |
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mmap !SYNC flag | |(from exist-| (from exist- |
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and | | ing alias)| ing alias) |
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any alias to this area| | | |
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/dev/mem | -- | WB | WB |
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mmap !SYNC flag | | | |
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no alias to this area | | | |
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and | | | |
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MTRR says WB | | | |
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/dev/mem | -- | -- | UC_MINUS |
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mmap !SYNC flag | | | |
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no alias to this area | | | |
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and | | | |
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MTRR says !WB | | | |
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-------------------------------------------------------------------
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Notes:
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-- in the above table mean "Not suggested usage for the API". Some of the --'s
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are strictly enforced by the kernel. Some others are not really enforced
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today, but may be enforced in future.
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For ioremap and pci access through /sys or /proc - The actual type returned
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can be more restrictive, in case of any existing aliasing for that address.
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For example: If there is an existing uncached mapping, a new ioremap_wc can
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return uncached mapping in place of write-combine requested.
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set_memory_[uc|wc] and set_memory_wb should be used in pairs, where driver will
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first make a region uc or wc and switch it back to wb after use.
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Over time writes to /proc/mtrr will be deprecated in favor of using PAT based
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interfaces. Users writing to /proc/mtrr are suggested to use above interfaces.
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Drivers should use ioremap_[uc|wc] to access PCI BARs with [uc|wc] access
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types.
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Drivers should use set_memory_[uc|wc] to set access type for RAM ranges.
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