8b8bfe0165
Make msm_drm into single module and all child driver registers and unregisters are handled from parent's register and unregister respectively. Change-Id: I017513d1de3b6b25dd5543d7fa7741c0bac1740d Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org> Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org> Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
684 lines
16 KiB
C
684 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/iommu.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-buf.h>
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#include <linux/of_platform.h>
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#include <linux/msm_dma_iommu_mapping.h>
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#include <asm/dma-iommu.h>
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#include "soc/qcom/secure_buffer.h"
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#include "sde_rotator_base.h"
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#include "sde_rotator_util.h"
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#include "sde_rotator_io_util.h"
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#include "sde_rotator_smmu.h"
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#include "sde_rotator_debug.h"
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#define SMMU_SDE_ROT_SEC "qcom,smmu_sde_rot_sec"
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#define SMMU_SDE_ROT_UNSEC "qcom,smmu_sde_rot_unsec"
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struct sde_smmu_domain {
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char *ctx_name;
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int domain;
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};
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static inline bool sde_smmu_is_valid_domain_type(
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struct sde_rot_data_type *mdata, int domain_type)
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{
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return true;
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}
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static inline bool sde_smmu_is_valid_domain_condition(
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struct sde_rot_data_type *mdata,
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int domain_type,
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bool is_attach)
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{
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if (is_attach) {
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if (test_bit(SDE_CAPS_SEC_ATTACH_DETACH_SMMU,
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mdata->sde_caps_map) &&
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(mdata->sec_cam_en &&
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domain_type == SDE_IOMMU_DOMAIN_ROT_SECURE))
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return false;
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else
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return true;
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} else {
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if (test_bit(SDE_CAPS_SEC_ATTACH_DETACH_SMMU,
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mdata->sde_caps_map) &&
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(mdata->sec_cam_en &&
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domain_type == SDE_IOMMU_DOMAIN_ROT_SECURE))
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return true;
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else
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return false;
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}
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}
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struct sde_smmu_client *sde_smmu_get_cb(u32 domain)
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{
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struct sde_rot_data_type *mdata = sde_rot_get_mdata();
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if (!sde_smmu_is_valid_domain_type(mdata, domain))
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return NULL;
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return (domain >= SDE_IOMMU_MAX_DOMAIN) ? NULL :
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&mdata->sde_smmu[domain];
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}
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static int sde_smmu_util_parse_dt_clock(struct platform_device *pdev,
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struct sde_module_power *mp)
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{
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u32 i = 0, rc = 0;
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const char *clock_name;
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u32 clock_rate;
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int num_clk;
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num_clk = of_property_count_strings(pdev->dev.of_node,
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"clock-names");
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if (num_clk < 0) {
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SDEROT_DBG("clocks are not defined\n");
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num_clk = 0;
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}
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mp->num_clk = num_clk;
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mp->clk_config = devm_kzalloc(&pdev->dev,
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sizeof(struct sde_clk) * mp->num_clk, GFP_KERNEL);
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if (num_clk && !mp->clk_config) {
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rc = -ENOMEM;
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mp->num_clk = 0;
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goto clk_err;
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}
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for (i = 0; i < mp->num_clk; i++) {
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of_property_read_string_index(pdev->dev.of_node, "clock-names",
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i, &clock_name);
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strlcpy(mp->clk_config[i].clk_name, clock_name,
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sizeof(mp->clk_config[i].clk_name));
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of_property_read_u32_index(pdev->dev.of_node, "clock-rate",
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i, &clock_rate);
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mp->clk_config[i].rate = clock_rate;
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if (!clock_rate)
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mp->clk_config[i].type = SDE_CLK_AHB;
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else
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mp->clk_config[i].type = SDE_CLK_PCLK;
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}
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clk_err:
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return rc;
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}
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static int sde_smmu_clk_register(struct platform_device *pdev,
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struct sde_module_power *mp)
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{
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int i, ret;
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struct clk *clk;
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ret = sde_smmu_util_parse_dt_clock(pdev, mp);
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if (ret) {
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SDEROT_ERR("unable to parse clocks\n");
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return -EINVAL;
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}
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for (i = 0; i < mp->num_clk; i++) {
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clk = devm_clk_get(&pdev->dev,
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mp->clk_config[i].clk_name);
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if (IS_ERR(clk)) {
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SDEROT_ERR("unable to get clk: %s\n",
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mp->clk_config[i].clk_name);
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return PTR_ERR(clk);
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}
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mp->clk_config[i].clk = clk;
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}
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return 0;
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}
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static int sde_smmu_enable_power(struct sde_smmu_client *sde_smmu,
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bool enable)
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{
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int rc = 0;
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struct sde_module_power *mp;
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if (!sde_smmu)
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return -EINVAL;
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mp = &sde_smmu->mp;
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if (!mp->num_vreg && !mp->num_clk)
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return 0;
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if (enable) {
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rc = sde_rot_enable_vreg(mp->vreg_config, mp->num_vreg, true);
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if (rc) {
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SDEROT_ERR("vreg enable failed - rc:%d\n", rc);
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goto end;
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}
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sde_update_reg_bus_vote(sde_smmu->reg_bus_clt,
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VOTE_INDEX_76_MHZ);
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rc = sde_rot_enable_clk(mp->clk_config, mp->num_clk, true);
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if (rc) {
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SDEROT_ERR("clock enable failed - rc:%d\n", rc);
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sde_update_reg_bus_vote(sde_smmu->reg_bus_clt,
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VOTE_INDEX_DISABLE);
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sde_rot_enable_vreg(mp->vreg_config, mp->num_vreg,
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false);
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goto end;
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}
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} else {
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sde_rot_enable_clk(mp->clk_config, mp->num_clk, false);
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sde_update_reg_bus_vote(sde_smmu->reg_bus_clt,
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VOTE_INDEX_DISABLE);
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sde_rot_enable_vreg(mp->vreg_config, mp->num_vreg, false);
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}
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end:
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return rc;
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}
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/*
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* sde_smmu_attach()
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*
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* Associates each configured VA range with the corresponding smmu context
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* bank device. Enables the clks as smmu requires voting it before the usage.
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* And iommu attach is done only once during the initial attach and it is never
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* detached as smmu v2 uses a feature called 'retention'.
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*/
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int sde_smmu_attach(struct sde_rot_data_type *mdata)
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{
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struct sde_smmu_client *sde_smmu;
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int i, rc = 0;
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for (i = 0; i < SDE_IOMMU_MAX_DOMAIN; i++) {
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if (!sde_smmu_is_valid_domain_type(mdata, i))
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continue;
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sde_smmu = sde_smmu_get_cb(i);
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if (sde_smmu && sde_smmu->dev) {
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rc = sde_smmu_enable_power(sde_smmu, true);
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if (rc) {
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SDEROT_ERR(
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"power enable failed - domain:[%d] rc:%d\n",
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i, rc);
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goto err;
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}
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if (!sde_smmu->domain_attached &&
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sde_smmu_is_valid_domain_condition(mdata,
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i,
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true)) {
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rc = iommu_attach_device(
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sde_smmu->rot_domain, sde_smmu->dev);
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if (rc) {
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SDEROT_ERR(
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"iommu attach device failed for domain[%d] with err:%d\n",
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i, rc);
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sde_smmu_enable_power(sde_smmu,
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false);
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goto err;
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}
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sde_smmu->domain_attached = true;
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SDEROT_DBG("iommu v2 domain[%i] attached\n", i);
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}
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} else {
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SDEROT_DBG(
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"iommu device not attached for domain[%d]\n",
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i);
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}
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}
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return 0;
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err:
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for (i--; i >= 0; i--) {
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sde_smmu = sde_smmu_get_cb(i);
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if (sde_smmu && sde_smmu->dev) {
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iommu_detach_device(sde_smmu->rot_domain,
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sde_smmu->dev);
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sde_smmu_enable_power(sde_smmu, false);
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sde_smmu->domain_attached = false;
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}
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}
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return rc;
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}
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/*
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* sde_smmu_detach()
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*
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* Only disables the clks as it is not required to detach the iommu mapped
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* VA range from the device in smmu as explained in the sde_smmu_attach
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*/
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int sde_smmu_detach(struct sde_rot_data_type *mdata)
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{
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struct sde_smmu_client *sde_smmu;
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int i;
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for (i = 0; i < SDE_IOMMU_MAX_DOMAIN; i++) {
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if (!sde_smmu_is_valid_domain_type(mdata, i))
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continue;
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sde_smmu = sde_smmu_get_cb(i);
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if (sde_smmu && sde_smmu->dev) {
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if (sde_smmu->domain_attached &&
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sde_smmu_is_valid_domain_condition(mdata,
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i, false)) {
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iommu_detach_device(sde_smmu->rot_domain,
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sde_smmu->dev);
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SDEROT_DBG("iommu domain[%i] detached\n", i);
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sde_smmu->domain_attached = false;
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}
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else {
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sde_smmu_enable_power(sde_smmu, false);
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}
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}
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}
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return 0;
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}
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int sde_smmu_get_domain_id(u32 type)
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{
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return type;
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}
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/*
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* sde_smmu_dma_buf_attach()
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*
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* Same as sde_smmu_dma_buf_attach except that the device is got from
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* the configured smmu v2 context banks.
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*/
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struct dma_buf_attachment *sde_smmu_dma_buf_attach(
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struct dma_buf *dma_buf, struct device *dev, int domain)
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{
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struct sde_smmu_client *sde_smmu = sde_smmu_get_cb(domain);
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if (!sde_smmu) {
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SDEROT_ERR("not able to get smmu context\n");
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return NULL;
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}
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return dma_buf_attach(dma_buf, sde_smmu->dev);
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}
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/*
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* sde_smmu_map_dma_buf()
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*
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* Maps existing buffer (by struct scatterlist) into SMMU context bank device.
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* From which we can take the virtual address and size allocated.
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* msm_map_dma_buf is depricated with smmu v2 and it uses dma_map_sg instead
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*/
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int sde_smmu_map_dma_buf(struct dma_buf *dma_buf,
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struct sg_table *table, int domain, dma_addr_t *iova,
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unsigned long *size, int dir)
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{
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int rc;
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struct sde_smmu_client *sde_smmu = sde_smmu_get_cb(domain);
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unsigned long attrs = 0;
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if (!sde_smmu) {
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SDEROT_ERR("not able to get smmu context\n");
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return -EINVAL;
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}
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rc = dma_map_sg_attrs(sde_smmu->dev, table->sgl, table->nents, dir,
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attrs);
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if (!rc) {
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SDEROT_ERR("dma map sg failed\n");
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return -ENOMEM;
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}
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*iova = table->sgl->dma_address;
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*size = table->sgl->dma_length;
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return 0;
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}
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void sde_smmu_unmap_dma_buf(struct sg_table *table, int domain,
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int dir, struct dma_buf *dma_buf)
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{
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struct sde_smmu_client *sde_smmu = sde_smmu_get_cb(domain);
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if (!sde_smmu) {
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SDEROT_ERR("not able to get smmu context\n");
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return;
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}
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dma_unmap_sg(sde_smmu->dev, table->sgl, table->nents, dir);
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}
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static DEFINE_MUTEX(sde_smmu_ref_cnt_lock);
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int sde_smmu_ctrl(int enable)
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{
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struct sde_rot_data_type *mdata = sde_rot_get_mdata();
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int rc = 0;
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mutex_lock(&sde_smmu_ref_cnt_lock);
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SDEROT_EVTLOG(__builtin_return_address(0), enable, mdata->iommu_ref_cnt,
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mdata->iommu_attached);
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SDEROT_DBG("%pS: enable:%d ref_cnt:%d attach:%d\n",
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__builtin_return_address(0), enable, mdata->iommu_ref_cnt,
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mdata->iommu_attached);
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if (enable) {
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if (!mdata->iommu_attached) {
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rc = sde_smmu_attach(mdata);
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if (!rc)
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mdata->iommu_attached = true;
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}
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mdata->iommu_ref_cnt++;
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} else {
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if (mdata->iommu_ref_cnt) {
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mdata->iommu_ref_cnt--;
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if (mdata->iommu_ref_cnt == 0)
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if (mdata->iommu_attached) {
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rc = sde_smmu_detach(mdata);
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if (!rc)
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mdata->iommu_attached = false;
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}
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} else {
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SDEROT_ERR("unbalanced iommu ref\n");
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}
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}
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mutex_unlock(&sde_smmu_ref_cnt_lock);
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if (rc < 0)
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return rc;
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else
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return mdata->iommu_ref_cnt;
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}
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int sde_smmu_secure_ctrl(int enable)
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{
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struct sde_rot_data_type *mdata = sde_rot_get_mdata();
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int rc = 0;
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mutex_lock(&sde_smmu_ref_cnt_lock);
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/*
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* Attach/detach secure context irrespective of ref count,
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* We come here only when secure camera is disabled
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*/
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if (enable) {
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rc = sde_smmu_attach(mdata);
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if (!rc)
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mdata->iommu_attached = true;
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} else {
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rc = sde_smmu_detach(mdata);
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/*
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* keep iommu_attached equal to true,
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* so that driver does not attemp to attach
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* while in secure state
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*/
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}
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mutex_unlock(&sde_smmu_ref_cnt_lock);
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return rc;
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}
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/*
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* sde_smmu_device_create()
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* @dev: sde_mdp device
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*
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* For smmu, each context bank is a separate child device of sde rot.
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* Platform devices are created for those smmu related child devices of
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* sde rot here. This would facilitate probes to happen for these devices in
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* which the smmu mapping and initialization is handled.
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*/
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void sde_smmu_device_create(struct device *dev)
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{
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struct device_node *parent, *child;
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struct sde_rot_data_type *mdata = sde_rot_get_mdata();
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parent = dev->of_node;
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for_each_child_of_node(parent, child) {
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if (of_device_is_compatible(child, SMMU_SDE_ROT_SEC)) {
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of_platform_device_create(child, NULL, dev);
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mdata->sde_smmu
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[SDE_IOMMU_DOMAIN_ROT_SECURE].domain_attached = true;
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} else if (of_device_is_compatible(child, SMMU_SDE_ROT_UNSEC)) {
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of_platform_device_create(child, NULL, dev);
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mdata->sde_smmu
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[SDE_IOMMU_DOMAIN_ROT_UNSECURE].domain_attached = true;
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}
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}
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}
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int sde_smmu_init(struct device *dev)
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{
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sde_smmu_device_create(dev);
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return 0;
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}
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static int sde_smmu_fault_handler(struct iommu_domain *domain,
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struct device *dev, unsigned long iova,
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int flags, void *token)
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{
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struct sde_smmu_client *sde_smmu;
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int rc = -EINVAL;
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if (!token) {
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SDEROT_ERR("Error: token is NULL\n");
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return -EINVAL;
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}
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sde_smmu = (struct sde_smmu_client *)token;
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/* trigger rotator dump */
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SDEROT_ERR("trigger rotator dump, iova=0x%08lx, flags=0x%x\n",
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iova, flags);
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SDEROT_ERR("SMMU device:%s", sde_smmu->dev->kobj.name);
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/* generate dump, but no panic */
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SDEROT_EVTLOG_TOUT_HANDLER("rot", "rot_dbg_bus", "vbif_dbg_bus");
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/*
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* return -ENOSYS to allow smmu driver to dump out useful
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* debug info.
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*/
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return rc;
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}
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static struct sde_smmu_domain sde_rot_unsec = {
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"rot_0", SDE_IOMMU_DOMAIN_ROT_UNSECURE};
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static struct sde_smmu_domain sde_rot_sec = {
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"rot_1", SDE_IOMMU_DOMAIN_ROT_SECURE};
|
|
|
|
static const struct of_device_id sde_smmu_dt_match[] = {
|
|
{ .compatible = SMMU_SDE_ROT_UNSEC, .data = &sde_rot_unsec},
|
|
{ .compatible = SMMU_SDE_ROT_SEC, .data = &sde_rot_sec},
|
|
{}
|
|
};
|
|
|
|
/*
|
|
* sde_smmu_probe()
|
|
* @pdev: platform device
|
|
*
|
|
* Each smmu context acts as a separate device and the context banks are
|
|
* configured with a VA range.
|
|
* Registeres the clks as each context bank has its own clks, for which voting
|
|
* has to be done everytime before using that context bank.
|
|
*/
|
|
int sde_smmu_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev;
|
|
struct sde_rot_data_type *mdata = sde_rot_get_mdata();
|
|
struct sde_smmu_client *sde_smmu;
|
|
int rc = 0;
|
|
struct sde_smmu_domain smmu_domain;
|
|
const struct of_device_id *match;
|
|
struct sde_module_power *mp;
|
|
char name[MAX_CLIENT_NAME_LEN];
|
|
u32 sid = 0;
|
|
|
|
if (!mdata) {
|
|
SDEROT_INFO(
|
|
"probe failed as mdata is not initializedi, probe defer\n");
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
match = of_match_device(sde_smmu_dt_match, &pdev->dev);
|
|
if (!match || !match->data) {
|
|
SDEROT_ERR("probe failed as match data is invalid\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
smmu_domain = *(struct sde_smmu_domain *) (match->data);
|
|
if (smmu_domain.domain >= SDE_IOMMU_MAX_DOMAIN) {
|
|
SDEROT_ERR("no matching device found\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (of_find_property(pdev->dev.of_node, "iommus", NULL)) {
|
|
dev = &pdev->dev;
|
|
rc = of_property_read_u32_index(pdev->dev.of_node, "iommus",
|
|
1, &sid);
|
|
if (rc)
|
|
SDEROT_DBG("SID not defined for domain:%d",
|
|
smmu_domain.domain);
|
|
} else {
|
|
SDEROT_ERR("Invalid SMMU ctx for domain:%d\n",
|
|
smmu_domain.domain);
|
|
return -EINVAL;
|
|
}
|
|
|
|
sde_smmu = &mdata->sde_smmu[smmu_domain.domain];
|
|
sde_smmu->domain = smmu_domain.domain;
|
|
sde_smmu->sid = sid;
|
|
mp = &sde_smmu->mp;
|
|
memset(mp, 0, sizeof(struct sde_module_power));
|
|
|
|
if (of_find_property(pdev->dev.of_node,
|
|
"gdsc-mdss-supply", NULL)) {
|
|
|
|
mp->vreg_config = devm_kzalloc(&pdev->dev,
|
|
sizeof(struct sde_vreg), GFP_KERNEL);
|
|
if (!mp->vreg_config)
|
|
return -ENOMEM;
|
|
|
|
strlcpy(mp->vreg_config->vreg_name, "gdsc-mdss",
|
|
sizeof(mp->vreg_config->vreg_name));
|
|
mp->num_vreg = 1;
|
|
}
|
|
|
|
if (mp->vreg_config) {
|
|
rc = sde_rot_config_vreg(&pdev->dev, mp->vreg_config,
|
|
mp->num_vreg, true);
|
|
if (rc) {
|
|
SDEROT_ERR("vreg config failed rc=%d\n", rc);
|
|
goto release_vreg;
|
|
}
|
|
}
|
|
|
|
rc = sde_smmu_clk_register(pdev, mp);
|
|
if (rc) {
|
|
SDEROT_ERR(
|
|
"smmu clk register failed for domain[%d] with err:%d\n",
|
|
smmu_domain.domain, rc);
|
|
goto disable_vreg;
|
|
}
|
|
|
|
snprintf(name, MAX_CLIENT_NAME_LEN, "smmu:%u", smmu_domain.domain);
|
|
sde_smmu->reg_bus_clt = sde_reg_bus_vote_client_create(name);
|
|
if (IS_ERR_OR_NULL(sde_smmu->reg_bus_clt)) {
|
|
SDEROT_ERR("mdss bus client register failed\n");
|
|
rc = PTR_ERR(sde_smmu->reg_bus_clt);
|
|
sde_smmu->reg_bus_clt = NULL;
|
|
goto unregister_clk;
|
|
}
|
|
|
|
rc = sde_smmu_enable_power(sde_smmu, true);
|
|
if (rc) {
|
|
SDEROT_ERR("power enable failed - domain:[%d] rc:%d\n",
|
|
smmu_domain.domain, rc);
|
|
goto bus_client_destroy;
|
|
}
|
|
|
|
sde_smmu->dev = &pdev->dev;
|
|
sde_smmu->rot_domain = iommu_get_domain_for_dev(sde_smmu->dev);
|
|
if (!sde_smmu->rot_domain) {
|
|
dev_err(&pdev->dev, "iommu get domain failed\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!dev->dma_parms)
|
|
dev->dma_parms = devm_kzalloc(dev,
|
|
sizeof(*dev->dma_parms), GFP_KERNEL);
|
|
|
|
dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
|
|
dma_set_seg_boundary(dev, (unsigned long)DMA_BIT_MASK(64));
|
|
|
|
iommu_set_fault_handler(sde_smmu->rot_domain,
|
|
sde_smmu_fault_handler, (void *)sde_smmu);
|
|
|
|
sde_smmu_enable_power(sde_smmu, false);
|
|
|
|
SDEROT_INFO(
|
|
"iommu v2 domain[%d] mapping and clk register successful!\n",
|
|
smmu_domain.domain);
|
|
return 0;
|
|
|
|
bus_client_destroy:
|
|
sde_reg_bus_vote_client_destroy(sde_smmu->reg_bus_clt);
|
|
sde_smmu->reg_bus_clt = NULL;
|
|
unregister_clk:
|
|
disable_vreg:
|
|
sde_rot_config_vreg(&pdev->dev, sde_smmu->mp.vreg_config,
|
|
sde_smmu->mp.num_vreg, false);
|
|
release_vreg:
|
|
devm_kfree(&pdev->dev, sde_smmu->mp.vreg_config);
|
|
sde_smmu->mp.vreg_config = NULL;
|
|
sde_smmu->mp.num_vreg = 0;
|
|
return rc;
|
|
}
|
|
|
|
int sde_smmu_remove(struct platform_device *pdev)
|
|
{
|
|
int i;
|
|
struct sde_smmu_client *sde_smmu;
|
|
|
|
for (i = 0; i < SDE_IOMMU_MAX_DOMAIN; i++) {
|
|
sde_smmu = sde_smmu_get_cb(i);
|
|
if (!sde_smmu || !sde_smmu->dev ||
|
|
(sde_smmu->dev != &pdev->dev))
|
|
continue;
|
|
|
|
sde_smmu->dev = NULL;
|
|
sde_smmu->rot_domain = NULL;
|
|
sde_smmu_enable_power(sde_smmu, false);
|
|
sde_reg_bus_vote_client_destroy(sde_smmu->reg_bus_clt);
|
|
sde_smmu->reg_bus_clt = NULL;
|
|
sde_rot_config_vreg(&pdev->dev, sde_smmu->mp.vreg_config,
|
|
sde_smmu->mp.num_vreg, false);
|
|
devm_kfree(&pdev->dev, sde_smmu->mp.vreg_config);
|
|
sde_smmu->mp.vreg_config = NULL;
|
|
sde_smmu->mp.num_vreg = 0;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sde_smmu_driver = {
|
|
.probe = sde_smmu_probe,
|
|
.remove = sde_smmu_remove,
|
|
.shutdown = NULL,
|
|
.driver = {
|
|
.name = "sde_smmu",
|
|
.of_match_table = sde_smmu_dt_match,
|
|
},
|
|
};
|
|
|
|
void __init sde_rotator_smmu_driver_register(void)
|
|
{
|
|
platform_driver_register(&sde_smmu_driver);
|
|
}
|
|
|
|
void __exit sde_rotator_smmu_driver_unregister(void)
|
|
{
|
|
platform_driver_unregister(&sde_smmu_driver);
|
|
}
|