ef6051a90e
A macro used internally in the bitops.h file to identify the number of leading zeros (__cntlz) was implemented incorrectly for Xtensa processors that don't provide the 'nsa/nsau' instructions. As a result, the dependent functions and macros (ffs, ffz, fls) were broken. Signed-off-by: Chris Zankel <chris@zankel.net>
116 lines
2.6 KiB
C
116 lines
2.6 KiB
C
/*
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* include/asm-xtensa/bitops.h
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*
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* Atomic operations that C can't guarantee us.Useful for resource counting etc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2007 Tensilica Inc.
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*/
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#ifndef _XTENSA_BITOPS_H
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#define _XTENSA_BITOPS_H
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#ifdef __KERNEL__
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#include <asm/processor.h>
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#include <asm/byteorder.h>
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#include <asm/system.h>
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#ifdef CONFIG_SMP
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# error SMP not supported on this architecture
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#endif
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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#include <asm-generic/bitops/atomic.h>
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#include <asm-generic/bitops/non-atomic.h>
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#if XCHAL_HAVE_NSA
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static inline unsigned long __cntlz (unsigned long x)
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{
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int lz;
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asm ("nsau %0, %1" : "=r" (lz) : "r" (x));
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return lz;
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}
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/*
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* ffz: Find first zero in word. Undefined if no zero exists.
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*/
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static inline int ffz(unsigned long x)
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{
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return 31 - __cntlz(~x & -~x);
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}
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/*
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* __ffs: Find first bit set in word. Return 0 for bit 0
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*/
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static inline int __ffs(unsigned long x)
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{
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return 31 - __cntlz(x & -x);
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}
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#ifdef __KERNEL__
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/*
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* ffs: Find first bit set in word. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static inline int ffs(unsigned long x)
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{
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return 32 - __cntlz(x & -x);
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}
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/*
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* fls: Find last (most-significant) bit set in word.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static inline int fls (unsigned int x)
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{
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return 32 - __cntlz(x);
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}
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#else
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/* Use the generic implementation if we don't have the nsa/nsau instructions. */
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# include <asm-generic/bitops/ffs.h>
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# include <asm-generic/bitops/__ffs.h>
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# include <asm-generic/bitops/ffz.h>
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# include <asm-generic/bitops/fls.h>
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#endif
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#include <asm-generic/bitops/fls64.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#ifdef __XTENSA_EL__
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# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr),(addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr),(addr))
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#elif defined(__XTENSA_EB__)
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# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr) ^ 0x18, (addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr)^0x18,(addr))
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#else
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# error processor byte order undefined!
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#endif
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/minix.h>
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_BITOPS_H */
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