49148020bc
Merge header files for m68k and m68knommu to the single location:
arch/m68k/include/asm
The majority of this patch was the result of the
script that is included in the changelog below.
The script was originally written by Arnd Bergman and
exten by me to cover a few more files.
When the header files differed the script uses the following:
The original m68k file is named <file>_mm.h [mm for memory manager]
The m68knommu file is named <file>_no.h [no for no memory manager]
The files uses the following include guard:
This include gaurd works as the m68knommu toolchain set
the __uClinux__ symbol - so this should work in userspace too.
Merging the header files for m68k and m68knommu exposes the
(unexpected?) ABI differences thus it is easier to actually
identify these and thus to fix them.
The commit has been build tested with both a m68k and
a m68knommu toolchain - with success.
The commit has also been tested with "make headers_check"
and this patch fixes make headers_check for m68knommu.
The script used:
TARGET=arch/m68k/include/asm
SOURCE=arch/m68knommu/include/asm
INCLUDE="cachectl.h errno.h fcntl.h hwtest.h ioctls.h ipcbuf.h \
linkage.h math-emu.h md.h mman.h movs.h msgbuf.h openprom.h \
oplib.h poll.h posix_types.h resource.h rtc.h sembuf.h shmbuf.h \
shm.h shmparam.h socket.h sockios.h spinlock.h statfs.h stat.h \
termbits.h termios.h tlb.h types.h user.h"
EQUAL="auxvec.h cputime.h device.h emergency-restart.h futex.h \
ioctl.h irq_regs.h kdebug.h local.h mutex.h percpu.h \
sections.h topology.h"
NOMUUFILES="anchor.h bootstd.h coldfire.h commproc.h dbg.h \
elia.h flat.h m5206sim.h m520xsim.h m523xsim.h m5249sim.h \
m5272sim.h m527xsim.h m528xsim.h m5307sim.h m532xsim.h \
m5407sim.h m68360_enet.h m68360.h m68360_pram.h m68360_quicc.h \
m68360_regs.h MC68328.h MC68332.h MC68EZ328.h MC68VZ328.h \
mcfcache.h mcfdma.h mcfmbus.h mcfne.h mcfpci.h mcfpit.h \
mcfsim.h mcfsmc.h mcftimer.h mcfuart.h mcfwdebug.h \
nettel.h quicc_simple.h smp.h"
FILES="atomic.h bitops.h bootinfo.h bug.h bugs.h byteorder.h cache.h \
cacheflush.h checksum.h current.h delay.h div64.h \
dma-mapping.h dma.h elf.h entry.h fb.h fpu.h hardirq.h hw_irq.h io.h \
irq.h kmap_types.h machdep.h mc146818rtc.h mmu.h mmu_context.h \
module.h page.h page_offset.h param.h pci.h pgalloc.h \
pgtable.h processor.h ptrace.h scatterlist.h segment.h \
setup.h sigcontext.h siginfo.h signal.h string.h system.h swab.h \
thread_info.h timex.h tlbflush.h traps.h uaccess.h ucontext.h \
unaligned.h unistd.h"
mergefile() {
BASE=${1%.h}
git mv ${SOURCE}/$1 ${TARGET}/${BASE}_no.h
git mv ${TARGET}/$1 ${TARGET}/${BASE}_mm.h
cat << EOF > ${TARGET}/$1
EOF
git add ${TARGET}/$1
}
set -e
mkdir -p ${TARGET}
git mv include/asm-m68k/* ${TARGET}
rmdir include/asm-m68k
git rm ${SOURCE}/Kbuild
for F in $INCLUDE $EQUAL; do
git rm ${SOURCE}/$F
done
for F in $NOMUUFILES; do
git mv ${SOURCE}/$F ${TARGET}/$F
done
for F in $FILES ; do
mergefile $F
done
rmdir arch/m68knommu/include/asm
rmdir arch/m68knommu/include
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
326 lines
7.9 KiB
C
326 lines
7.9 KiB
C
/****************************************************************************/
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/*
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* mcfne.h -- NE2000 in ColdFire eval boards.
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*
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* (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com)
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* (C) Copyright 2000, Lineo (www.lineo.com)
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* (C) Copyright 2001, SnapGear (www.snapgear.com)
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*
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* 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board
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*
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* Hacked support for m5206e Cadre III evaluation board
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* Fred Stevens (fred.stevens@pemstar.com) 13 April 1999
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*/
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/****************************************************************************/
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#ifndef mcfne_h
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#define mcfne_h
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/****************************************************************************/
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/*
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* Support for NE2000 clones devices in ColdFire based boards.
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* Not all boards address these parts the same way, some use a
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* direct addressing method, others use a side-band address space
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* to access odd address registers, some require byte swapping
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* others do not.
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*/
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#define BSWAP(w) (((w) << 8) | ((w) >> 8))
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#define RSWAP(w) (w)
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/*
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* Define the basic hardware resources of NE2000 boards.
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*/
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#if defined(CONFIG_ARN5206)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0xf0
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 4
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5206eC3)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1c
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 4
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
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#define NE2000_ADDR 0x30000300
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#define NE2000_IRQ_VECTOR 25
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#define NE2000_IRQ_PRIORITY 1
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#define NE2000_IRQ_LEVEL 3
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#define NE2000_BYTE volatile unsigned char
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#endif
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#if defined(CONFIG_M5307C3)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1b
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
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#define NE2000_ADDR 0x30600300
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#define NE2000_ODDOFFSET 0x00008000
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#define NE2000_IRQ_VECTOR 67
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#undef BSWAP
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#define BSWAP(w) (w)
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#define NE2000_BYTE volatile unsigned short
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#undef RSWAP
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#define RSWAP(w) (((w) << 8) | ((w) >> 8))
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#endif
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#if defined(CONFIG_M5307) && defined(CONFIG_NETtel)
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#define NE2000_ADDR0 0x30600300
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#define NE2000_ADDR1 0x30800300
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#define NE2000_ODDOFFSET 0x00008000
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#define NE2000_IRQ_VECTOR0 27
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#define NE2000_IRQ_VECTOR1 29
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#undef BSWAP
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#define BSWAP(w) (w)
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#define NE2000_BYTE volatile unsigned short
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#undef RSWAP
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#define RSWAP(w) (((w) << 8) | ((w) >> 8))
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#endif
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#if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3)
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#define NE2000_ADDR 0x30600300
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#define NE2000_ODDOFFSET 0x00008000
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#define NE2000_IRQ_VECTOR 27
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#undef BSWAP
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#define BSWAP(w) (w)
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#define NE2000_BYTE volatile unsigned short
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#undef RSWAP
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#define RSWAP(w) (((w) << 8) | ((w) >> 8))
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#endif
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#if defined(CONFIG_ARN5307)
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#define NE2000_ADDR 0xfe600300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1b
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 3
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5407C3)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1b
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#define NE2000_BYTE volatile unsigned short
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#endif
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/****************************************************************************/
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/*
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* Side-band address space for odd address requires re-mapping
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* many of the standard ISA access functions.
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*/
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#ifdef NE2000_ODDOFFSET
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#undef outb
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#undef outb_p
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#undef inb
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#undef inb_p
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#undef outsb
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#undef outsw
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#undef insb
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#undef insw
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#define outb ne2000_outb
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#define inb ne2000_inb
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#define outb_p ne2000_outb
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#define inb_p ne2000_inb
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#define outsb ne2000_outsb
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#define outsw ne2000_outsw
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#define insb ne2000_insb
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#define insw ne2000_insw
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#ifndef COLDFIRE_NE2000_FUNCS
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void ne2000_outb(unsigned int val, unsigned int addr);
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int ne2000_inb(unsigned int addr);
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void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len);
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void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len);
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void ne2000_outsb(unsigned int addr, void *vbuf, unsigned long len);
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void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len);
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#else
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/*
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* This macro converts a conventional register address into the
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* real memory pointer of the mapped NE2000 device.
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* On most NE2000 implementations on ColdFire boards the chip is
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* mapped in kinda funny, due to its ISA heritage.
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*/
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#define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr))
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#define NE2000_DATA_PTR(addr) (addr)
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void ne2000_outb(unsigned int val, unsigned int addr)
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{
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NE2000_BYTE *rp;
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rp = (NE2000_BYTE *) NE2000_PTR(addr);
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*rp = RSWAP(val);
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}
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int ne2000_inb(unsigned int addr)
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{
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NE2000_BYTE *rp, val;
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rp = (NE2000_BYTE *) NE2000_PTR(addr);
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val = *rp;
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return((int) ((NE2000_BYTE) RSWAP(val)));
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}
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void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len)
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{
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NE2000_BYTE *rp, val;
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unsigned char *buf;
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buf = (unsigned char *) vbuf;
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rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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val = *rp;
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*buf++ = RSWAP(val);
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}
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}
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void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len)
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{
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volatile unsigned short *rp;
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unsigned short w, *buf;
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buf = (unsigned short *) vbuf;
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rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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w = *rp;
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*buf++ = BSWAP(w);
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}
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}
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void ne2000_outsb(unsigned int addr, const void *vbuf, unsigned long len)
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{
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NE2000_BYTE *rp, val;
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unsigned char *buf;
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buf = (unsigned char *) vbuf;
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rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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val = *buf++;
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*rp = RSWAP(val);
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}
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}
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void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
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{
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volatile unsigned short *rp;
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unsigned short w, *buf;
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buf = (unsigned short *) vbuf;
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rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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w = *buf++;
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*rp = BSWAP(w);
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}
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}
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#endif /* COLDFIRE_NE2000_FUNCS */
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#endif /* NE2000_OFFOFFSET */
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/****************************************************************************/
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#ifdef COLDFIRE_NE2000_FUNCS
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/*
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* Lastly the interrupt set up code...
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* Minor differences between the different board types.
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*/
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#if defined(CONFIG_ARN5206)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned char *icrp;
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icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
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*icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2;
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
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}
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#endif
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#if defined(CONFIG_M5206eC3)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned char *icrp;
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icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
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*icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
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}
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
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void ne2000_irqsetup(int irq)
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{
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mcf_autovector(irq);
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}
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#endif
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#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned long *icrp;
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volatile unsigned long *pitr;
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/* The NE2000 device uses external IRQ3 */
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x77077777) | 0x00d00000;
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pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR);
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*pitr = *pitr | 0x20000000;
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}
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void ne2000_irqack(int irq)
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{
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volatile unsigned long *icrp;
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/* The NE2000 device uses external IRQ3 */
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x77777777) | 0x00800000;
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}
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#endif
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#if defined(CONFIG_M5307) || defined(CONFIG_M5407)
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#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
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void ne2000_irqsetup(int irq)
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{
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
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mcf_autovector(irq);
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}
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#else
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void ne2000_irqsetup(int irq)
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{
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
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}
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#endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */
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#endif /* CONFIG_M5307 || CONFIG_M5407 */
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#endif /* COLDFIRE_NE2000_FUNCS */
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/****************************************************************************/
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#endif /* mcfne_h */
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