f1f17716d1
This fixes MPC834x MDS (formerly SYS) and ITX platform code to get IRQ data (including PCI) from the device tree, and to use the new IPIC code. renamed defconfig (sys -> mds), left one redundant NULL assignment in mpc83xx_pcibios_fixup to keep the compiler happy. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
116 lines
2.9 KiB
C
116 lines
2.9 KiB
C
/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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int mpc83xx_pci2_busno;
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int mpc83xx_exclude_device(u_char bus, u_char devfn)
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{
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if (bus == 0 && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (mpc83xx_pci2_busno)
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if (bus == (mpc83xx_pci2_busno) && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return PCIBIOS_SUCCESSFUL;
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}
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void __init mpc83xx_pcibios_fixup(void)
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{
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struct pci_dev *dev = NULL;
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/* map all the PCI irqs */
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for_each_pci_dev(dev)
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pci_read_irq_line(dev);
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}
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int __init add_bridge(struct device_node *dev)
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{
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int len;
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struct pci_controller *hose;
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struct resource rsrc;
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int *bus_range;
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int primary = 1, has_address = 0;
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phys_addr_t immr = get_immrbase();
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DBG("Adding PCI host bridge %s\n", dev->full_name);
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/* Fetch host bridge registers address */
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has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
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/* Get bus range if any */
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bus_range = (int *)get_property(dev, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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}
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hose = pcibios_alloc_controller();
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->set_cfg_type = 1;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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/* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
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* the other at 0x8600, we consider the 0x8500 the primary controller
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*/
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/* PCI 1 */
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if ((rsrc.start & 0xfffff) == 0x8500) {
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setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304);
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}
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/* PCI 2 */
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if ((rsrc.start & 0xfffff) == 0x8600) {
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setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384);
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primary = 0;
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hose->bus_offset = hose->first_busno;
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mpc83xx_pci2_busno = hose->first_busno;
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}
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printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
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"Firmware bus number: %d->%d\n",
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(unsigned long long)rsrc.start, hose->first_busno,
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hose->last_busno);
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DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
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hose, hose->cfg_addr, hose->cfg_data);
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/* Interpret the "ranges" property */
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/* This also maps the I/O region and sets isa_io/mem_base */
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pci_process_bridge_OF_ranges(hose, dev, primary);
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return 0;
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}
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