f265dc4c5d
Due to an OMAP3 errata (1.142), on HS/EMU devices SDRC should be programed to issue automatic self refresh on timeout of AUTO_CNT = 1 prior to any transition to OFF mode. This is needed only on sil rev's ES3.0 and above. This patch enables the above needed WA in the SDRC power register value stored in scratchpad, so that ROM code restores this value in SDRC POWER on the wakeup path. The original SDRC POWER register value is stored and restored back in omap_sram_idle() function. This fixes some random crashes observed while stressing suspend on HS/EMU devices. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> |
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blizzard.h | ||
board-ams-delta.h | ||
board-sx1.h | ||
board-voiceblue.h | ||
board.h | ||
clkdev.h | ||
clock.h | ||
clockdomain.h | ||
common.h | ||
control.h | ||
cpu.h | ||
dma.h | ||
dmtimer.h | ||
dsp_common.h | ||
fpga.h | ||
gpio-switch.h | ||
gpio.h | ||
gpmc-smc91x.h | ||
gpmc.h | ||
hardware.h | ||
hwa742.h | ||
io.h | ||
iommu2.h | ||
iommu.h | ||
iovmm.h | ||
irda.h | ||
irqs.h | ||
keypad.h | ||
lcd_mipid.h | ||
led.h | ||
mailbox.h | ||
mcbsp.h | ||
mcspi.h | ||
memory.h | ||
menelaus.h | ||
mmc.h | ||
mux.h | ||
nand.h | ||
omap7xx.h | ||
omap16xx.h | ||
omap24xx.h | ||
omap34xx.h | ||
omap44xx.h | ||
omap730.h | ||
omap850.h | ||
omap1510.h | ||
omap_device.h | ||
omap_hwmod.h | ||
omap-alsa.h | ||
omap-pm.h | ||
omapfb.h | ||
onenand.h | ||
param.h | ||
powerdomain.h | ||
prcm.h | ||
sdrc.h | ||
serial.h | ||
smp.h | ||
sram.h | ||
system.h | ||
tc.h | ||
timer-gp.h | ||
timex.h | ||
uncompress.h | ||
usb.h |