Ville Syrjala 3149be50d3 sm501: add support for the SM502 programmable PLL ... SM502 has a programmable PLL which can provide the panel pixel clock instead of the 288MHz and 336MHz PLLs. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Ville Syrjala <syrjala@sci.fi> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>		2008-03-04 16:35:13 -08:00
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asic3.c	ASIC3 driver	2008-02-07 08:42:23 -08:00
Kconfig	ASIC3 driver	2008-02-07 08:42:23 -08:00
Makefile	ASIC3 driver	2008-02-07 08:42:23 -08:00
mcp-core.c
mcp-sa11x0.c
mcp.h
sm501.c	sm501: add support for the SM502 programmable PLL	2008-03-04 16:35:13 -08:00
ucb1x00-assabet.c	[ARM] Fix class_device damage caused by 0c55445f20	2008-01-28 10:59:09 +00:00
ucb1x00-core.c
ucb1x00-ts.c
ucb1x00.h