bb13b5fdba
Patch from Tony Lindgren This patch by various OMAP developers syncs the OMAP specific arch files with the linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
121 lines
3.0 KiB
C
121 lines
3.0 KiB
C
/*
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* linux/arch/arm/plat-omap/clock.h
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*
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* Copyright (C) 2004 Nokia corporation
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* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
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* Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_OMAP_CLOCK_H
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#define __ARCH_ARM_OMAP_CLOCK_H
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struct module;
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struct clk {
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struct list_head node;
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struct module *owner;
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const char *name;
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struct clk *parent;
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unsigned long rate;
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__s8 usecount;
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__u16 flags;
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__u32 enable_reg;
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__u8 enable_bit;
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__u8 rate_offset;
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void (*recalc)(struct clk *);
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int (*set_rate)(struct clk *, unsigned long);
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long (*round_rate)(struct clk *, unsigned long);
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void (*init)(struct clk *);
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};
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struct mpu_rate {
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unsigned long rate;
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unsigned long xtal;
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unsigned long pll_rate;
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__u16 ckctl_val;
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__u16 dpllctl_val;
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};
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/* Clock flags */
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#define RATE_CKCTL 1
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#define RATE_FIXED 2
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#define RATE_PROPAGATES 4
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#define VIRTUAL_CLOCK 8
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#define ALWAYS_ENABLED 16
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#define ENABLE_REG_32BIT 32
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#define CLOCK_IN_OMAP16XX 64
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#define CLOCK_IN_OMAP1510 128
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#define CLOCK_IN_OMAP730 256
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#define DSP_DOMAIN_CLOCK 512
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#define VIRTUAL_IO_ADDRESS 1024
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/* ARM_CKCTL bit shifts */
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#define CKCTL_PERDIV_OFFSET 0
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#define CKCTL_LCDDIV_OFFSET 2
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#define CKCTL_ARMDIV_OFFSET 4
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#define CKCTL_DSPDIV_OFFSET 6
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#define CKCTL_TCDIV_OFFSET 8
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#define CKCTL_DSPMMUDIV_OFFSET 10
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/*#define ARM_TIMXO 12*/
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#define EN_DSPCK 13
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/*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */
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/* DSP_CKCTL bit shifts */
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#define CKCTL_DSPPERDIV_OFFSET 0
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/* ARM_IDLECT1 bit shifts */
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/*#define IDLWDT_ARM 0*/
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/*#define IDLXORP_ARM 1*/
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/*#define IDLPER_ARM 2*/
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/*#define IDLLCD_ARM 3*/
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/*#define IDLLB_ARM 4*/
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/*#define IDLHSAB_ARM 5*/
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/*#define IDLIF_ARM 6*/
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/*#define IDLDPLL_ARM 7*/
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/*#define IDLAPI_ARM 8*/
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/*#define IDLTIM_ARM 9*/
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/*#define SETARM_IDLE 11*/
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/* ARM_IDLECT2 bit shifts */
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#define EN_WDTCK 0
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#define EN_XORPCK 1
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#define EN_PERCK 2
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#define EN_LCDCK 3
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#define EN_LBCK 4 /* Not on 1610/1710 */
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/*#define EN_HSABCK 5*/
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#define EN_APICK 6
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#define EN_TIMCK 7
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#define DMACK_REQ 8
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#define EN_GPIOCK 9 /* Not on 1610/1710 */
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/*#define EN_LBFREECK 10*/
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#define EN_CKOUT_ARM 11
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/* ARM_IDLECT3 bit shifts */
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#define EN_OCPI_CK 0
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#define EN_TC1_CK 2
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#define EN_TC2_CK 4
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/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
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#define EN_DSPTIMCK 5
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/* Various register defines for clock controls scattered around OMAP chip */
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#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
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#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
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#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
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#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
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#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
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#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
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#define SOFT_REQ_REG 0xfffe0834
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#define SOFT_REQ_REG2 0xfffe0880
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int clk_register(struct clk *clk);
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void clk_unregister(struct clk *clk);
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int clk_init(void);
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#endif
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