f481bfafd3
Make page table walking on s390 more robust. The current code requires that the pgd/pud/pmd/pte loop is only done for address ranges that are below the end address of the last vma of the address space. But this is not always true, e.g. the generic page table walker does not guarantee this. Change TASK_SIZE/TASK_SIZE_OF to reflect the current size of the address space. This makes the generic page table walker happy but it breaks the upgrade of a 3 level page table to a 4 level page table. To make the upgrade work again another fix is required. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
362 lines
9.2 KiB
C
362 lines
9.2 KiB
C
/*
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* include/asm-s390/processor.h
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*
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* S390 version
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* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Hartmut Penner (hp@de.ibm.com),
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* Martin Schwidefsky (schwidefsky@de.ibm.com)
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*
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* Derived from "include/asm-i386/processor.h"
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* Copyright (C) 1994, Linus Torvalds
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*/
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#ifndef __ASM_S390_PROCESSOR_H
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#define __ASM_S390_PROCESSOR_H
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#include <linux/linkage.h>
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#include <asm/ptrace.h>
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#ifdef __KERNEL__
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
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/*
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* CPU type and hardware bug flags. Kept separately for each CPU.
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* Members of this structure are referenced in head.S, so think twice
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* before touching them. [mj]
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*/
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typedef struct
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{
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unsigned int version : 8;
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unsigned int ident : 24;
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unsigned int machine : 16;
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unsigned int unused : 16;
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} __attribute__ ((packed)) cpuid_t;
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static inline void get_cpu_id(cpuid_t *ptr)
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{
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asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
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}
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struct cpuinfo_S390
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{
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cpuid_t cpu_id;
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__u16 cpu_addr;
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__u16 cpu_nr;
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unsigned long loops_per_jiffy;
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unsigned long *pgd_quick;
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#ifdef __s390x__
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unsigned long *pmd_quick;
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#endif /* __s390x__ */
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unsigned long *pte_quick;
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unsigned long pgtable_cache_sz;
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};
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extern void s390_adjust_jiffies(void);
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extern void print_cpu_info(struct cpuinfo_S390 *);
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extern int get_cpu_capability(unsigned int *);
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/*
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* User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
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*/
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#ifndef __s390x__
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#define TASK_SIZE (1UL << 31)
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#define TASK_UNMAPPED_BASE (1UL << 30)
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#else /* __s390x__ */
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#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
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#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
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(1UL << 30) : (1UL << 41))
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#define TASK_SIZE TASK_SIZE_OF(current)
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#endif /* __s390x__ */
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#ifdef __KERNEL__
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#ifndef __s390x__
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#define STACK_TOP (1UL << 31)
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#define STACK_TOP_MAX (1UL << 31)
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#else /* __s390x__ */
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#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
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#define STACK_TOP_MAX (1UL << 42)
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#endif /* __s390x__ */
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#endif
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#define HAVE_ARCH_PICK_MMAP_LAYOUT
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typedef struct {
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__u32 ar4;
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} mm_segment_t;
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/*
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* Thread structure
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*/
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struct thread_struct {
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s390_fp_regs fp_regs;
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unsigned int acrs[NUM_ACRS];
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unsigned long ksp; /* kernel stack pointer */
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mm_segment_t mm_segment;
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unsigned long prot_addr; /* address of protection-excep. */
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unsigned int trap_no;
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per_struct per_info;
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/* Used to give failing instruction back to user for ieee exceptions */
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unsigned long ieee_instruction_pointer;
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/* pfault_wait is used to block the process on a pfault event */
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unsigned long pfault_wait;
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};
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typedef struct thread_struct thread_struct;
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/*
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* Stack layout of a C stack frame.
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*/
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#ifndef __PACK_STACK
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struct stack_frame {
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unsigned long back_chain;
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unsigned long empty1[5];
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unsigned long gprs[10];
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unsigned int empty2[8];
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};
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#else
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struct stack_frame {
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unsigned long empty1[5];
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unsigned int empty2[8];
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unsigned long gprs[10];
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unsigned long back_chain;
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};
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#endif
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#define ARCH_MIN_TASKALIGN 8
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#define INIT_THREAD { \
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.ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
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}
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/*
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* Do necessary setup to start up a new thread.
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*/
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#define start_thread(regs, new_psw, new_stackp) do { \
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set_fs(USER_DS); \
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regs->psw.mask = psw_user_bits; \
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regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
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regs->gprs[15] = new_stackp; \
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} while (0)
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#define start_thread31(regs, new_psw, new_stackp) do { \
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set_fs(USER_DS); \
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regs->psw.mask = psw_user32_bits; \
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regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
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regs->gprs[15] = new_stackp; \
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crst_table_downgrade(current->mm, 1UL << 31); \
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} while (0)
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/* Forward declaration, a strange C thing */
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struct task_struct;
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struct mm_struct;
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struct seq_file;
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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/* Prepare to copy thread state - unlazy all lazy status */
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#define prepare_to_copy(tsk) do { } while (0)
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/*
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* Return saved PC of a blocked thread.
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*/
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extern unsigned long thread_saved_pc(struct task_struct *t);
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/*
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* Print register of task into buffer. Used in fs/proc/array.c.
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*/
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extern void task_show_regs(struct seq_file *m, struct task_struct *task);
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extern void show_code(struct pt_regs *regs);
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unsigned long get_wchan(struct task_struct *p);
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#define task_pt_regs(tsk) ((struct pt_regs *) \
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(task_stack_page(tsk) + THREAD_SIZE) - 1)
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
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/*
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* Give up the time slice of the virtual PU.
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*/
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static inline void cpu_relax(void)
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{
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if (MACHINE_HAS_DIAG44)
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asm volatile("diag 0,0,68");
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barrier();
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}
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static inline void psw_set_key(unsigned int key)
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{
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asm volatile("spka 0(%0)" : : "d" (key));
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}
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/*
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* Set PSW to specified value.
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*/
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static inline void __load_psw(psw_t psw)
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{
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#ifndef __s390x__
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asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
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#else
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asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
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#endif
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}
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/*
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* Set PSW mask to specified value, while leaving the
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* PSW addr pointing to the next instruction.
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*/
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static inline void __load_psw_mask (unsigned long mask)
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{
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unsigned long addr;
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psw_t psw;
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psw.mask = mask;
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#ifndef __s390x__
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asm volatile(
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" basr %0,0\n"
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"0: ahi %0,1f-0b\n"
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" st %0,4(%1)\n"
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" lpsw 0(%1)\n"
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"1:"
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: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
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#else /* __s390x__ */
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asm volatile(
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" larl %0,1f\n"
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" stg %0,8(%1)\n"
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" lpswe 0(%1)\n"
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"1:"
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: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
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#endif /* __s390x__ */
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}
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/*
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* Function to stop a processor until an interruption occurred
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*/
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static inline void enabled_wait(void)
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{
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__load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
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PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
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}
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/*
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* Function to drop a processor into disabled wait state
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*/
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static inline void ATTRIB_NORET disabled_wait(unsigned long code)
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{
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unsigned long ctl_buf;
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psw_t dw_psw;
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dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
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dw_psw.addr = code;
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/*
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* Store status and then load disabled wait psw,
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* the processor is dead afterwards
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*/
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#ifndef __s390x__
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asm volatile(
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" stctl 0,0,0(%2)\n"
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" ni 0(%2),0xef\n" /* switch off protection */
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" lctl 0,0,0(%2)\n"
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" stpt 0xd8\n" /* store timer */
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" stckc 0xe0\n" /* store clock comparator */
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" stpx 0x108\n" /* store prefix register */
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" stam 0,15,0x120\n" /* store access registers */
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" std 0,0x160\n" /* store f0 */
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" std 2,0x168\n" /* store f2 */
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" std 4,0x170\n" /* store f4 */
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" std 6,0x178\n" /* store f6 */
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" stm 0,15,0x180\n" /* store general registers */
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" stctl 0,15,0x1c0\n" /* store control registers */
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" oi 0x1c0,0x10\n" /* fake protection bit */
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" lpsw 0(%1)"
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: "=m" (ctl_buf)
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: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
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#else /* __s390x__ */
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asm volatile(
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" stctg 0,0,0(%2)\n"
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" ni 4(%2),0xef\n" /* switch off protection */
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" lctlg 0,0,0(%2)\n"
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" lghi 1,0x1000\n"
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" stpt 0x328(1)\n" /* store timer */
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" stckc 0x330(1)\n" /* store clock comparator */
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" stpx 0x318(1)\n" /* store prefix register */
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" stam 0,15,0x340(1)\n"/* store access registers */
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" stfpc 0x31c(1)\n" /* store fpu control */
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" std 0,0x200(1)\n" /* store f0 */
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" std 1,0x208(1)\n" /* store f1 */
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" std 2,0x210(1)\n" /* store f2 */
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" std 3,0x218(1)\n" /* store f3 */
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" std 4,0x220(1)\n" /* store f4 */
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" std 5,0x228(1)\n" /* store f5 */
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" std 6,0x230(1)\n" /* store f6 */
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" std 7,0x238(1)\n" /* store f7 */
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" std 8,0x240(1)\n" /* store f8 */
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" std 9,0x248(1)\n" /* store f9 */
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" std 10,0x250(1)\n" /* store f10 */
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" std 11,0x258(1)\n" /* store f11 */
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" std 12,0x260(1)\n" /* store f12 */
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" std 13,0x268(1)\n" /* store f13 */
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" std 14,0x270(1)\n" /* store f14 */
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" std 15,0x278(1)\n" /* store f15 */
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" stmg 0,15,0x280(1)\n"/* store general registers */
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" stctg 0,15,0x380(1)\n"/* store control registers */
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" oi 0x384(1),0x10\n"/* fake protection bit */
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" lpswe 0(%1)"
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: "=m" (ctl_buf)
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: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
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#endif /* __s390x__ */
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while (1);
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}
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/*
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* Basic Machine Check/Program Check Handler.
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*/
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extern void s390_base_mcck_handler(void);
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extern void s390_base_pgm_handler(void);
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extern void s390_base_ext_handler(void);
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extern void (*s390_base_mcck_handler_fn)(void);
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extern void (*s390_base_pgm_handler_fn)(void);
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extern void (*s390_base_ext_handler_fn)(void);
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#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
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#endif
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/*
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* Helper macro for exception table entries
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*/
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#ifndef __s390x__
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#define EX_TABLE(_fault,_target) \
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".section __ex_table,\"a\"\n" \
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" .align 4\n" \
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" .long " #_fault "," #_target "\n" \
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".previous\n"
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#else
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#define EX_TABLE(_fault,_target) \
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".section __ex_table,\"a\"\n" \
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" .align 8\n" \
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" .quad " #_fault "," #_target "\n" \
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".previous\n"
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#endif
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#endif /* __ASM_S390_PROCESSOR_H */
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