android_kernel_xiaomi_sm8350/include/linux/lis3lv02d.h
Daniel Mack 8873c33483 lis3: add free-fall/wakeup function via platform_data
This offers a way for platforms to define flags and thresholds for the
free-fall/wakeup functions of the lis302d chips.

More registers needed to be seperated as they are specific to the

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
Cc: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-09-22 07:17:48 -07:00

49 lines
1.4 KiB
C

#ifndef __LIS3LV02D_H_
#define __LIS3LV02D_H_
struct lis3lv02d_platform_data {
/* please note: the 'click' feature is only supported for
* LIS[32]02DL variants of the chip and will be ignored for
* others */
#define LIS3_CLICK_SINGLE_X (1 << 0)
#define LIS3_CLICK_DOUBLE_X (1 << 1)
#define LIS3_CLICK_SINGLE_Y (1 << 2)
#define LIS3_CLICK_DOUBLE_Y (1 << 3)
#define LIS3_CLICK_SINGLE_Z (1 << 4)
#define LIS3_CLICK_DOUBLE_Z (1 << 5)
unsigned char click_flags;
unsigned char click_thresh_x;
unsigned char click_thresh_y;
unsigned char click_thresh_z;
unsigned char click_time_limit;
unsigned char click_latency;
unsigned char click_window;
#define LIS3_IRQ1_DISABLE (0 << 0)
#define LIS3_IRQ1_FF_WU_1 (1 << 0)
#define LIS3_IRQ1_FF_WU_2 (2 << 0)
#define LIS3_IRQ1_FF_WU_12 (3 << 0)
#define LIS3_IRQ1_DATA_READY (4 << 0)
#define LIS3_IRQ1_CLICK (7 << 0)
#define LIS3_IRQ2_DISABLE (0 << 3)
#define LIS3_IRQ2_FF_WU_1 (1 << 3)
#define LIS3_IRQ2_FF_WU_2 (2 << 3)
#define LIS3_IRQ2_FF_WU_12 (3 << 3)
#define LIS3_IRQ2_DATA_READY (4 << 3)
#define LIS3_IRQ2_CLICK (7 << 3)
#define LIS3_IRQ_OPEN_DRAIN (1 << 6)
#define LIS3_IRQ_ACTIVE_LOW (1 << 7)
unsigned char irq_cfg;
#define LIS3_WAKEUP_X_LO (1 << 0)
#define LIS3_WAKEUP_X_HI (1 << 1)
#define LIS3_WAKEUP_Y_LO (1 << 2)
#define LIS3_WAKEUP_Y_HI (1 << 3)
#define LIS3_WAKEUP_Z_LO (1 << 4)
#define LIS3_WAKEUP_Z_HI (1 << 5)
unsigned char wakeup_flags;
unsigned char wakeup_thresh;
};
#endif /* __LIS3LV02D_H_ */