b0d5217cfb
Add support for gpiolib calls. This is based on the gpiolib implementation from plat-s3c64xx tree. Add support for external interrupts for GPIO H banks. Add support for GPIO interrupts for all banks. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
123 lines
3.0 KiB
C
123 lines
3.0 KiB
C
/* linux/arch/arm/plat-s5pc1xx/cpu.c
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* S5PC1XX CPU Support
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*
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* Based on plat-s3c64xx/cpu.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <asm/mach/map.h>
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#include <plat/regs-serial.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/s5pc100.h>
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/* table of supported CPUs */
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static const char name_s5pc100[] = "S5PC100";
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static struct cpu_table cpu_ids[] __initdata = {
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{
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.idcode = 0x43100000,
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.idmask = 0xfffff000,
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.map_io = s5pc100_map_io,
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.init_clocks = s5pc100_init_clocks,
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.init_uarts = s5pc100_init_uarts,
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.init = s5pc100_init,
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.name = name_s5pc100,
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},
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};
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/* minimal IO mapping */
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/* see notes on uart map in arch/arm/mach-s5pc100/include/mach/debug-macro.S */
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#define UART_OFFS (S3C_PA_UART & 0xffff)
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static struct map_desc s5pc1xx_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5PC1XX_VA_CLK_OTHER,
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.pfn = __phys_to_pfn(S5PC1XX_PA_CLK_OTHER),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_GPIO,
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.pfn = __phys_to_pfn(S5PC100_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_CHIPID,
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.pfn = __phys_to_pfn(S5PC1XX_PA_CHIPID),
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.length = SZ_16,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_CLK,
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.pfn = __phys_to_pfn(S5PC1XX_PA_CLK),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_PWR,
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.pfn = __phys_to_pfn(S5PC1XX_PA_PWR),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)(S5PC1XX_VA_UART),
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.pfn = __phys_to_pfn(S5PC1XX_PA_UART),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_VIC(0),
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.pfn = __phys_to_pfn(S5PC1XX_PA_VIC(0)),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_VIC(1),
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.pfn = __phys_to_pfn(S5PC1XX_PA_VIC(1)),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_VIC(2),
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.pfn = __phys_to_pfn(S5PC1XX_PA_VIC(2)),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC1XX_VA_TIMER,
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.pfn = __phys_to_pfn(S5PC1XX_PA_TIMER),
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.length = SZ_256,
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.type = MT_DEVICE,
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},
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};
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/* read cpu identification code */
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void __init s5pc1xx_init_io(struct map_desc *mach_desc, int size)
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{
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unsigned long idcode;
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/* initialise the io descriptors we need for initialisation */
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iotable_init(s5pc1xx_iodesc, ARRAY_SIZE(s5pc1xx_iodesc));
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iotable_init(mach_desc, size);
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idcode = __raw_readl(S5PC1XX_VA_CHIPID);
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s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
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}
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