81d79bec34
Use ARRAY_SIZE macro already defined in linux/kernel.h Signed-off-by: Ahmed S. Darwish <darwish.07@gmail.com> Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
74 lines
2.2 KiB
C
74 lines
2.2 KiB
C
/*
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* arch/v850/kernel/me2.c -- V850E/ME2 chip-specific support
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*
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* Copyright (C) 2003 NEC Corporation
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* Copyright (C) 2003 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/bootmem.h>
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#include <linux/irq.h>
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#include <asm/atomic.h>
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#include <asm/page.h>
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#include <asm/machdep.h>
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#include <asm/v850e_timer_d.h>
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#include "mach.h"
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void __init mach_sched_init (struct irqaction *timer_action)
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{
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/* Start hardware timer. */
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v850e_timer_d_configure (0, HZ);
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/* Install timer interrupt handler. */
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setup_irq (IRQ_INTCMD(0), timer_action);
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}
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static struct v850e_intc_irq_init irq_inits[] = {
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{ "IRQ", 0, NUM_CPU_IRQS, 1, 7 },
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{ "INTP", IRQ_INTP(0), IRQ_INTP_NUM, 1, 5 },
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{ "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 3 },
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{ "UBTIRE", IRQ_INTUBTIRE(0), IRQ_INTUBTIRE_NUM, 5, 4 },
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{ "UBTIR", IRQ_INTUBTIR(0), IRQ_INTUBTIR_NUM, 5, 4 },
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{ "UBTIT", IRQ_INTUBTIT(0), IRQ_INTUBTIT_NUM, 5, 4 },
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{ "UBTIF", IRQ_INTUBTIF(0), IRQ_INTUBTIF_NUM, 5, 4 },
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{ "UBTITO", IRQ_INTUBTITO(0), IRQ_INTUBTITO_NUM, 5, 4 },
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{ 0 }
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};
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#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
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static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
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/* Initialize V850E/ME2 chip interrupts. */
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void __init me2_init_irqs (void)
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{
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v850e_intc_init_irq_types (irq_inits, hw_itypes);
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}
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/* Called before configuring an on-chip UART. */
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void me2_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
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{
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if (chan == 0) {
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/* Specify that the relevent pins on the chip should do
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serial I/O, not direct I/O. */
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ME2_PORT1_PMC |= 0xC;
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/* Specify that we're using the UART, not the CSI device. */
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ME2_PORT1_PFC |= 0xC;
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} else if (chan == 1) {
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/* Specify that the relevent pins on the chip should do
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serial I/O, not direct I/O. */
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ME2_PORT2_PMC |= 0x6;
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/* Specify that we're using the UART, not the CSI device. */
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ME2_PORT2_PFC |= 0x6;
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}
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}
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