fcc188e7fd
The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440 chips. To allow for this, this patch moves the definition of the ERPN used for mapping UART0 from being hard-coded in the head_44x.S assembly code to being defined in ibm44x.h. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> |
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| .. | ||
| 4xx_io | ||
| 8xx_io | ||
| 8260_io | ||
| amiga | ||
| boot | ||
| configs | ||
| kernel | ||
| lib | ||
| math-emu | ||
| mm | ||
| platforms | ||
| syslib | ||
| xmon | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||