7795566495
The DMA base registers are available in a global named "base_addr" for every Blackfin variant. Give this a more descriptive name, and remove duplicate tables from some drivers. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
55 lines
1.6 KiB
C
55 lines
1.6 KiB
C
/*****************************************************************************
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*
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* BF-533/2/1 Specific Declarations
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*
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****************************************************************************/
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/*
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* File: include/asm-blackfin/mach-bf533/dma.h
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* Based on:
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* Author:
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*
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* Created:
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* Description:
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*
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* Rev:
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*
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* Modified:
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING.
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* If not, write to the Free Software Foundation,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _MACH_DMA_H_
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#define _MACH_DMA_H_
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#define MAX_BLACKFIN_DMA_CHANNEL 12
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#define CH_PPI 0
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#define CH_SPORT0_RX 1
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#define CH_SPORT0_TX 2
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#define CH_SPORT1_RX 3
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#define CH_SPORT1_TX 4
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#define CH_SPI 5
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#define CH_UART_RX 6
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#define CH_UART_TX 7
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#define CH_MEM_STREAM0_DEST 8 /* TX */
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#define CH_MEM_STREAM0_SRC 9 /* RX */
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#define CH_MEM_STREAM1_DEST 10 /* TX */
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#define CH_MEM_STREAM1_SRC 11 /* RX */
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#endif
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