android_kernel_xiaomi_sm8350/arch/mips/sgi-ip32/ip32-dma.c
Christoph Hellwig 03df8229a8
MIPS: IP32: use generic dma noncoherent ops
Provide phys_to_dma/dma_to_phys helpers, everything else is generic.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Patchwork: https://patchwork.linux-mips.org/patch/19546/
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org
2018-06-24 09:27:27 -07:00

38 lines
953 B
C

// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
*/
#include <linux/dma-direct.h>
#include <asm/ip32/crime.h>
/*
* Few notes.
* 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
* 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
* native-endian)
* 3. All other devices see memory as one big chunk at 0x40000000
* 4. Non-PCI devices will pass NULL as struct device*
*
* Thus we translate differently, depending on device.
*/
#define RAM_OFFSET_MASK 0x3fffffffUL
dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
{
dma_addr_t dma_addr = paddr & RAM_OFFSET_MASK;
if (!dev)
dma_addr += CRIME_HI_MEM_BASE;
return dma_addr;
}
phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
{
phys_addr_t paddr = dma_addr & RAM_OFFSET_MASK;
if (dma_addr >= 256*1024*1024)
paddr += CRIME_HI_MEM_BASE;
return paddr;
}