tests: bring back mult and sqr timing

This commit is contained in:
Steffen Jaeckel 2014-07-12 17:31:03 +02:00
parent 3c6a80525f
commit 9e2e7fdfd4

View File

@ -774,8 +774,10 @@ int time_hash(void)
return 0; return 0;
} }
#undef MPI
/*#warning you need an mp_rand!!!*/ /*#warning you need an mp_rand!!!*/
#ifndef USE_LTM
#undef MPI
#endif
#ifdef MPI #ifdef MPI
void time_mult(void) void time_mult(void)
@ -786,11 +788,11 @@ void time_mult(void)
fprintf(stderr, "Timing Multiplying:\n"); fprintf(stderr, "Timing Multiplying:\n");
mp_init_multi(&a,&b,&c,NULL); mp_init_multi(&a,&b,&c,NULL);
for (x = 128/DIGIT_BIT; x <= 1536/DIGIT_BIT; x += 128/DIGIT_BIT) { for (x = 128/MP_DIGIT_BIT; x <= (unsigned long)1536/MP_DIGIT_BIT; x += 128/MP_DIGIT_BIT) {
mp_rand(&a, x); mp_rand(a, x);
mp_rand(&b, x); mp_rand(b, x);
#define DO1 mp_mul(&a, &b, &c); #define DO1 mp_mul(a, b, c);
#define DO2 DO1; DO1; #define DO2 DO1; DO1;
t2 = -1; t2 = -1;
@ -801,9 +803,9 @@ void time_mult(void)
t1 = (t_read() - t1)>>1; t1 = (t_read() - t1)>>1;
if (t1 < t2) t2 = t1; if (t1 < t2) t2 = t1;
} }
fprintf(stderr, "%4lu bits: %9llu cycles\n", x*DIGIT_BIT, t2); fprintf(stderr, "%4lu bits: %9llu cycles\n", x*MP_DIGIT_BIT, t2);
} }
mp_clear_multi(&a,&b,&c,NULL); mp_clear_multi(a,b,c,NULL);
#undef DO1 #undef DO1
#undef DO2 #undef DO2
@ -813,14 +815,14 @@ void time_sqr(void)
{ {
ulong64 t1, t2; ulong64 t1, t2;
unsigned long x, y; unsigned long x, y;
mp_int a, b; void *a, *b;
fprintf(stderr, "Timing Squaring:\n"); fprintf(stderr, "Timing Squaring:\n");
mp_init_multi(&a,&b,NULL); mp_init_multi(&a,&b,NULL);
for (x = 128/DIGIT_BIT; x <= 1536/DIGIT_BIT; x += 128/DIGIT_BIT) { for (x = 128/MP_DIGIT_BIT; x <= (unsigned long)1536/MP_DIGIT_BIT; x += 128/MP_DIGIT_BIT) {
mp_rand(&a, x); mp_rand(a, x);
#define DO1 mp_sqr(&a, &b); #define DO1 mp_sqr(a, b);
#define DO2 DO1; DO1; #define DO2 DO1; DO1;
t2 = -1; t2 = -1;
@ -831,9 +833,9 @@ void time_sqr(void)
t1 = (t_read() - t1)>>1; t1 = (t_read() - t1)>>1;
if (t1 < t2) t2 = t1; if (t1 < t2) t2 = t1;
} }
fprintf(stderr, "%4lu bits: %9llu cycles\n", x*DIGIT_BIT, t2); fprintf(stderr, "%4lu bits: %9llu cycles\n", x*MP_DIGIT_BIT, t2);
} }
mp_clear_multi(&a,&b,NULL); mp_clear_multi(a,b,NULL);
#undef DO1 #undef DO1
#undef DO2 #undef DO2