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Commit Graph

18 Commits

Author SHA1 Message Date
f4exb
ddde7a925f MIMO: copied test source as multiple input. Adaptation of main classes 2019-05-18 06:30:37 +02:00
f4exb
ba4c8d7a68 Added the Local Source plugin 2019-05-10 13:20:30 +02:00
f4exb
fc49bd2855 ixed incomplete copyright headers (3): sdrbase 2019-04-11 14:32:15 +02:00
f4exb
53ff8f32bf BladeRF2 output: fixed SO mode 2018-09-29 21:40:22 +02:00
f4exb
8155825bc4 SDR daemon sink: implemeted WEB API 2018-05-28 00:40:33 +02:00
f4exb
72e29fd3f8 Moved export.h file to root of exports directory and removed util 2018-03-20 13:49:21 +01:00
f4exb
c22d146376 Adapt to MSVC linker 2018-03-03 20:23:38 +01:00
f4exb
5598265e66 Multiple modulators support: works with two modulators 2016-12-26 12:11:51 +01:00
f4exb
e05822ba02 Implement own FIFO in BasebandSampleSource. SampleSourceFIFO: remove useless chunk size completely and set initial fill to only half the FIFO size 2016-12-23 14:29:42 +01:00
f4exb
1afd8df5f9 Modulators: changed single Tx channel samples feed handling 2016-12-22 23:39:06 +01:00
f4exb
441c2c1817 Send number of samples to write in the writeData signal. Ask for half the buffer size when more than half of it is consumed 2016-12-21 02:24:49 +01:00
f4exb
0fc6d95357 Tx ph.1: fixed read pointer management when getting new samples 2016-10-25 03:31:36 +02:00
f4exb
ee55747c0b Tx ph.1: FileSink: set sample source FIFO size depending on sample rate 2016-10-25 02:34:29 +02:00
f4exb
289c1a203f Tx ph.1: Sample source FIFO read with signal. Use a specific spectrum sink (vis) reference in Device sink engine for main spectrum rendering 2016-10-24 18:06:44 +02:00
f4exb
8f70840561 Tx ph.1: fixed sample source FIFO 2016-10-23 23:27:19 +02:00
f4exb
4e446b9c7a Tx ph.1: fixed source sink initialization 2016-10-23 14:14:32 +02:00
f4exb
52b618469c Tx ph.1: refactored source sample FIFO. StarUML model: added Tx classes 2016-10-15 09:53:06 +02:00
f4exb
6e82cb37b8 Tx support: added a sample source FIFO class 2016-10-10 01:13:12 +02:00