f4exb
|
72e29fd3f8
|
Moved export.h file to root of exports directory and removed util
|
2018-03-20 13:49:21 +01:00 |
|
f4exb
|
980192548d
|
Adapt to MSVC linker: removed SDRANGEL_API
|
2018-03-03 21:19:59 +01:00 |
|
f4exb
|
c22d146376
|
Adapt to MSVC linker
|
2018-03-03 20:23:38 +01:00 |
|
f4exb
|
61a16eade9
|
Use always 16 bit DSP on Tx side
|
2018-01-22 10:46:57 +01:00 |
|
f4exb
|
bacc6659b0
|
24 bit DSP: use a different define for Tx chain so that it can stay on 16 bit DSP
|
2018-01-22 03:00:08 +01:00 |
|
f4exb
|
732561152b
|
24 bit DSP fix
|
2018-01-22 02:49:06 +01:00 |
|
f4exb
|
ad219d50cc
|
Implemented 24 bit internal DSP (with bugs ...)
|
2018-01-21 21:48:36 +01:00 |
|
f4exb
|
08ce7f423b
|
Templatize the accumulator type of integer half-band filters (non SIMD)
|
2018-01-21 19:39:51 +01:00 |
|
f4exb
|
c6083ea6f4
|
Down/Up channelizers: enqeue MsgChannelizerNotification to sample sink/source instead of processing it directly
|
2017-12-29 05:14:40 +01:00 |
|
f4exb
|
f6bc9daf8e
|
UpChannelizer: pass baseband sample rate in notification message
|
2017-08-06 17:10:29 +02:00 |
|
f4exb
|
e02ac85e50
|
All modulators: use buffer for input audio that is always in use while generation is running. This fixes lockup problem reported in issue #11
|
2016-12-26 01:39:34 +01:00 |
|
f4exb
|
f74e3b83a7
|
Modulators: changed single Tx channel samples feed handling. Pure virtual function is useless
|
2016-12-22 23:45:56 +01:00 |
|
f4exb
|
1afd8df5f9
|
Modulators: changed single Tx channel samples feed handling
|
2016-12-22 23:39:06 +01:00 |
|
f4exb
|
7015fb97d2
|
Put intrinsics in their own templatized classes
|
2016-11-07 04:16:02 +01:00 |
|
f4exb
|
63d6eea066
|
Use more precise SIMD flags and detect actual x86_64 SIMD features
|
2016-11-07 00:42:57 +01:00 |
|
f4exb
|
dbbbfa12ee
|
Changed USE_SIMD flag to USE_SSE
|
2016-11-06 02:08:38 +01:00 |
|
f4exb
|
bc3dfb19cd
|
IntHalfBandFilterEO2: use dual forward and backward buffers to avoid byte shuffling in SIMD instructions. Implemented in the up channelizer
|
2016-11-06 01:07:13 +01:00 |
|
f4exb
|
f2a50c0c0f
|
Use even/odd FIR filter half band interpolator only if SIMD is available
|
2016-11-04 22:47:09 +01:00 |
|
f4exb
|
9f74c82715
|
IntHalfBand FIR filter SSE optimizations
|
2016-11-04 01:12:39 +01:00 |
|
f4exb
|
5d5593bda7
|
Tx ph.2: put the double buffered FIR interpolator and decimator in its own class
|
2016-11-01 15:02:50 +01:00 |
|
f4exb
|
bd4d224166
|
Tx ph.2: IntHalfBandFilter: use double buffer technique for interpolation. Use it with the UpChannelizer and increase order to 96 for better spur rejection. Moreover it is still more CPU efficient
|
2016-11-01 05:54:25 +01:00 |
|
f4exb
|
004cbcb060
|
Tx ph.2: UpChannelizer: use order 64 filter as longer orders do not improve image rejection
|
2016-10-31 00:33:20 +01:00 |
|
f4exb
|
f5bbbb7cab
|
Tx ph.2: UpChannelizer: allow any sample rate
|
2016-10-30 22:01:20 +01:00 |
|
f4exb
|
91315913b4
|
Tx ph.2: change UpChannelizer filter chain from std::list to std::vector
|
2016-10-30 18:22:33 +01:00 |
|
f4exb
|
4a001350d3
|
Tx ph.2: Templatized IntHalfbandFilter and improved coefficients. Changed to order 80 for upsamplers and 48 for downsamplers
|
2016-10-29 17:01:02 +02:00 |
|
f4exb
|
b56c2d9a2c
|
Tx ph.1: new classes (1)
|
2016-10-17 08:58:49 +02:00 |
|