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Commit Graph

32 Commits

Author SHA1 Message Date
f4exb
50c868562a Decimators simplification 2018-05-11 00:48:37 +02:00
f4exb
4bb749ce65 Inf/Sup frequency shift scheme change to set bandwidth closer to device center frequency 2018-05-10 22:17:39 +02:00
f4exb
1fadbf3b8a Inf/Sup decimators fix (4): added decimators by 64 2018-05-10 10:07:42 +02:00
f4exb
41319b63e5 Inf/Sup decimators fix (3): all decimators but by 64 2018-05-10 04:37:51 +02:00
f4exb
f99f7cd598 Inf/Sup decimators fix (2): decimators by 4 2018-05-10 02:51:45 +02:00
f4exb
6841bf3efa Center decimator by 2 optimization 2018-05-10 02:26:38 +02:00
f4exb
0e55accd0f Inf/Sup decimators fix (1): decimators by 2 2018-05-10 02:14:16 +02:00
f4exb
17aa15c4d0 Unified the even/odd integer halfband filters 2018-05-02 14:00:03 +02:00
f4exb
19c32b4354 Removed 24/16 bit differentiation on Decimator instantiation where possible 2018-05-01 23:57:12 +02:00
f4exb
b23d1f6a63 Optimization: always use the even/odd decimators 2018-04-28 05:08:01 +02:00
f4exb
27623709f0 Rewrite of decimator ifdefs 2018-04-28 03:04:34 +02:00
f4exb
2427c885f7 Benchmarking: added option to deactivate SIMD for decimators 2018-04-26 22:45:47 +02:00
f4exb
b03e9c59cb Benchmarking: implemented decimator float to int test 2018-04-25 01:44:54 +02:00
f4exb
70ce8f1044 Perseus support (6) 2018-02-07 23:44:20 +01:00
f4exb
2ddcb8c358 Differentiate Rx and Tx DSP sample sizes 2018-01-22 08:46:05 +01:00
f4exb
732561152b 24 bit DSP fix 2018-01-22 02:49:06 +01:00
f4exb
ad219d50cc Implemented 24 bit internal DSP (with bugs ...) 2018-01-21 21:48:36 +01:00
f4exb
08ce7f423b Templatize the accumulator type of integer half-band filters (non SIMD) 2018-01-21 19:39:51 +01:00
f4exb
18fa3b6156 RTL-SDR: corrected bit shifts for 8 bit samples and corrected RTL-SDR unsigned to signed conversion 2018-01-15 23:37:26 +01:00
f4exb
45e04f06ae Compromise on 8 bit decimator pre process shift constants so that it pads to 15 bits instead of 16. Prevents saturation in all cases. 2018-01-14 05:12:24 +01:00
f4exb
176792c0ce Corrected 8 bit decimator pre process shift constants 2018-01-14 04:43:04 +01:00
f4exb
2d0ee4bf76 SDRplay plugin: adjust documentation. Corrections and re-organization of the main readme.md file 2016-11-21 18:07:58 +01:00
f4exb
863522d9ff SDRPlay support: source plugin interim state (1) compiles 2016-11-13 02:59:31 +01:00
f4exb
c91725fe01 Push decimators halfband filter order to 64 2016-11-09 04:03:12 +01:00
f4exb
0a6dc5db37 IntHalfband filters: tuned optimizations and chose the best for x86_64 2016-11-09 03:27:30 +01:00
f4exb
d2c6791eea Use IntHalfbandFilterST in decimators 2016-11-08 17:30:10 +01:00
f4exb
63d6eea066 Use more precise SIMD flags and detect actual x86_64 SIMD features 2016-11-07 00:42:57 +01:00
f4exb
dbbbfa12ee Changed USE_SIMD flag to USE_SSE 2016-11-06 02:08:38 +01:00
f4exb
3410d289d1 Use even/odd FIR filter based half band decimators for the device decimators 2016-11-05 21:52:13 +01:00
f4exb
942f897978 Use the double buffer FIR filter with the front end decimators 2016-11-02 09:15:32 +01:00
f4exb
4a001350d3 Tx ph.2: Templatized IntHalfbandFilter and improved coefficients. Changed to order 80 for upsamplers and 48 for downsamplers 2016-10-29 17:01:02 +02:00
f4exb
c6d7207b1a Reorganized sdrbase library code 2016-03-08 04:54:12 +01:00