firmware: qcom_scm: Add a scm calls for displace memory protect
Add a scm calls for displace memory protect. Change-Id: I8a23b13f1917adcad5f627f0f55fc7702bd01cd7 Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org> Signed-off-by: Elliot Berman <eberman@codeaurora.org>
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@ -1199,6 +1199,26 @@ int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_region,
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return ret ? : desc.res[0];
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}
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int __qcom_scm_mem_protect_sd_ctrl(struct device *dev, u32 devid,
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phys_addr_t mem_addr, u64 mem_size, u32 vmid)
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{
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int ret;
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struct qcom_scm_desc desc = {
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.svc = QCOM_SCM_SVC_MP,
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.cmd = QCOM_SCM_MP_CMD_SD_CTRL,
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.owner = ARM_SMCCC_OWNER_SIP
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};
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desc.args[0] = devid;
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desc.args[1] = mem_addr;
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desc.args[2] = mem_size;
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desc.args[3] = vmid;
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desc.arginfo = QCOM_SCM_ARGS(4);
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ret = qcom_scm_call(dev, &desc);
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return ret ? : desc.res[0];
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}
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int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev,
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unsigned int num_context_bank)
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{
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@ -510,6 +510,18 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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}
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EXPORT_SYMBOL(qcom_scm_assign_mem);
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/**
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* qcom_scm_mem_protect_sd_ctrl() - SDE memory protect.
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*
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*/
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int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr, u64 mem_size,
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u32 vmid)
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{
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return __qcom_scm_mem_protect_sd_ctrl(__scm->dev, devid, mem_addr,
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mem_size, vmid);
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}
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EXPORT_SYMBOL(qcom_scm_mem_protect_sd_ctrl);
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bool qcom_scm_kgsl_set_smmu_aperture_available(void)
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{
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int ret;
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@ -77,6 +77,7 @@ extern void __qcom_scm_mmu_sync(struct device *dev, bool sync);
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#define QCOM_SCM_MP_IOMMU_SECURE_MAP2_FLAT 0x12
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#define QCOM_SCM_MP_IOMMU_SECURE_UNMAP2_FLAT 0x13
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#define QCOM_SCM_MP_ASSIGN 0x16
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#define QCOM_SCM_MP_CMD_SD_CTRL 0x18
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#define QCOM_SCM_MP_CP_SMMU_APERTURE_ID 0x1b
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#define QCOM_SCM_MEMP_SHM_BRIDGE_ENABLE 0x1c
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#define QCOM_SCM_MEMP_SHM_BRIDGE_DELETE 0x1d
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@ -108,6 +109,8 @@ extern int __qcom_scm_assign_mem(struct device *dev,
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phys_addr_t mem_region, size_t mem_sz,
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phys_addr_t src, size_t src_sz,
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phys_addr_t dest, size_t dest_sz);
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extern int __qcom_scm_mem_protect_sd_ctrl(struct device *dev, u32 devid,
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phys_addr_t mem_addr, u64 mem_size, u32 vmid);
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extern int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev,
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unsigned int num_context_bank);
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extern int __qcom_scm_enable_shm_bridge(struct device *dev);
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@ -72,6 +72,8 @@ extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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unsigned int *src,
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const struct qcom_scm_vmperm *newvm,
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unsigned int dest_cnt);
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extern int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
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u64 mem_size, u32 vmid);
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extern bool qcom_scm_kgsl_set_smmu_aperture_available(void);
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extern int qcom_scm_kgsl_set_smmu_aperture(
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unsigned int num_context_bank);
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@ -177,6 +179,9 @@ static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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unsigned int *src,
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const struct qcom_scm_vmperm *newvm,
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unsigned int dest_cnt) { return -ENODEV; }
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static inline int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
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u64 mem_size, u32 vmid)
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{ return -ENODEV; }
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static inline bool qcom_scm_kgsl_set_smmu_aperture_available(void)
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{ return false; }
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static inline int qcom_scm_kgsl_set_smmu_aperture(
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