Calculate the number of cache aliases on probed L2 caches, and while
we're at it, print out the detected statistics at boot time for these
also.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We stopped referencing these functions unconditionally when the
old entry.S code was refactored, so this is just dead code at
present. Kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There was an off-by-1 on the cache alias detection logic on SH-4,
which caused n_aliases to always be 1 even when the page size
precluded the existence of aliases.
With this corrected, 64KB pages happily reports n_aliases == 0, and
hits the appropriate fast paths in the flushing routines.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There was a very preliminary bunch of SMP code scattered around for the
SH7604 microcontrollers from way back when, and it has mostly suffered
bitrot since then. With the tree already having been slowly getting
prepped for SMP, this plugs in most of the remaining platform-independent
bits.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements initial support for the SMP INTC (particularly
INTC2) controllers.
These are largely implemented as conventional blocks, with
register sets grouped together at fixed strides relative to
the CPU id.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds the TLB flushing routines for SMP systems, based on
the MIPS implementation, with some additional SH-specific
flush routines.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
current_cpu_data uses smp_processor_id() in order to find the
corresponding cpu_data. As the cache descs are all currently
identical, just have this look at probed results from the boot
CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This consolidates the cpu_data definitions and gets rid of the special
boot_cpu_data. It's made a wrapper to the boot CPU, in order to keep
the existing in-tree users happy.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The cpufreq driver banner is currently printed for each CPU, move
it down so it's not as noisy and it's only printed once.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The Maple bus is SEGA's proprietary serial bus for peripherals
(keyboard, mouse, controller etc). The bus is capable of some
(limited) hotplugging and operates at up to 2 M/bits.
Drivers of one sort or another existed/exist for 2.4 and a rudimentary
port, which didn't support the 2.6 device driver model was also in
existence.
This driver - for the bus logic itself and for the keyboard (other
drivers will follow) are based on the code and concepts of those old
drivers but have lots of completely rewritten parts.
I have the maple bus code as a built in now as that seems the sane and
rational way to handle something like that - you either want the bus
or you don't.
Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This update moves the flash mapping for the Magic Panel into the board
setup. It also removes references to the old MTD mapping option in the
defconfig.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.
The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).
Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up the port calculation logic for non-SuperIO accesses,
before these were always matching the MRSHPC base, now just make
sure the original port is handed back if it's not in the I/O port
range.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Most boards use 8 or 16-bit access for the LED bank, se7206
needs 32. There's only 8 individual LEDs however, each with
a 'special' value in terms of logical ordering. Go FPGA, go!
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The port routines were logically inverted, and the MRSHPC range had
no upper bound, causing 8 and 16-bit port I/O to get mangled.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7720 (SH3-DSP) based Magic Panel R2
board.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
IRQ0->IRQ3 need to be an IRQ mode for these to work, fix them up.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This leads to invalid configurations where both FPU and DSP support
can be enabled in the same kernel, resulting in build failure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The kgdb console code requires uart_set_options() and friends, which
are only provided by the serial core when console support is enabled.
These were sitting under CONFIG_SH_KGDB and resulted in a link error
when console support wasn't enabled, work that by rolling the console
routines under CONFIG_SH_KGDB_CONSOLE, which they should have been
all along.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The vector changed, so follow the INTC changes for the new vector.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some trivial fixes to get SH7709 + HD64461 building again.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Build fixes for the hp6xx APM code, as well as some adjustments for
the battery values.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
HP6xx uses OFFCHIP_IRQ_BASE to know the base irq number where non
cpu interrupts should start. This define was in irq.h before, but
since rework got lost. It really belongs inside hd64461.h since
the hp6xx wont work without it.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds inline versions of writesb(), readsb(), writesw() and
readsw() to include/asm-sh/io.h. Stolen from include/asm-avr32/io.h.
These functions are needed to compile certain device drivers such as
ax88796.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch removes the sh778x specific pci code that pokes in the
interrupt controller and overwrites things. The new and improved IRL
code manages this in plat_irq_setup() and plat_irq_setup_pins()
instead.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch reworks the highlander irq code for r7780mp and r7785rp.
The same strategy as for the new R2D code is used here - the board
specific interrupts are now starting from HL_FPGA_IRQ_BASE. The code
for r7780rp is not touched due to lack of hardware.
Tested with CF, AX88796 on r7780mp and r7785rp. The touch switch
interrupt has also been tested on r7780mp.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch contains the following fixes:
- Adds sh7785 support to CONFIG_EARLY_SCIF_CONSOLE_PORT.
- Removes duplicate include from rts7751r2d irq code.
- Removes CONFIG_CPU_HAS_INTC from sh7720 Kconfig entry.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch contains the following fixes and improvements:
- Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780.
- Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking.
- Good old IRQ_MODE_IRLnnnn should not register any intc controller.
- plat_irq_setup_pins() now selects IRL or IRQ mode.
- the holding function is now disabled using ICR0.
By default all external pin interrupts are disabled.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The maple bus driver (http://lkml.org/lkml/2007/9/4/165) uses hardware
synchronisation between the maple bus and the VBLANK to poll the maple
bus. This patch makes the interrupt shareable.
By definition the interrupt is for both devices.
Signed-off by: Adrian McMenamin <adrian@mcmen.demon.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
