Commit Graph

673 Commits

Author SHA1 Message Date
Fudong Zhang
43cb7c3234 msm: vidc: support input crop feature for encoder
Support input crop feature for encoder

Change-Id: Ic7b5a273fc589b917b4b7672d67026cda7264941
2021-07-22 01:33:28 -07:00
Fudong Zhang
ad091aa6ae msm: vidc: Add platform capabilities for scuba
Add platform specific capabilities for scuba target.

Change-Id: I1296b4934b1d3e2fb338fd0eff2617d45d406286
2021-07-09 01:02:59 -07:00
Fudong Zhang
a65ceebe83 msm: vidc: Add config files for scuba
Add video config files for scuba to enable
the video driver for scuba target

Change-Id: I2ee99356ab66f81e2b1a15b4a76155938ffe0db5
2021-07-09 14:42:44 +08:00
qctecmdr
171f80434d Merge "msm: vidc: Fix low latency log print" 2021-07-04 18:21:53 -07:00
Priyanka Gujjula
763a8236a8 msm: vidc: Fix low latency log print
Fix low latency log print for decoder

Change-Id: I9fbcb0650a1c89ef4863866225c0e98092f51409
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2021-06-22 10:19:33 +05:30
Sayantan Majumder
20846af219 msm: vidc: enabling dynamic session context for different targets
Adding support to enable dynamic maximum no of instances for
video sessions based on the different platforms.

Change-Id: I16b92cc8cc740809042947590dcd73dcf4801f96
Signed-off-by: Sayantan Majumder <smajumde@codeaurora.org>
2021-06-17 00:52:55 +05:30
Sayantan Majumder
b1b38cd347 msm: vidc: enabling new DTSI compatibility for IOT specific target
Added new compatibility string to enable video H/W acceleration
for qcm6490

Change-Id: I51fcc010cc85e05f26ac5b1e8d3ba4ad5fa8b052
Signed-off-by: Sayantan Majumder <smajumde@codeaurora.org>
2021-06-17 00:31:15 +05:30
qctecmdr
d8e78d23c3 Merge "msm: vidc: Add support for encoder complexity" 2021-06-15 00:47:01 -07:00
Santhosh Behara
ca17de823f msm: vidc: Add support for encoder complexity
Add support for encoder complexity handling.
Enable lowpower mode if the complexity is 0.

Change-Id: Ife290b377c844e5b1d3be93b2509c787f8e05c59
Signed-off-by: Santhosh Behara <santhoshbehara@codeaurora.org>
2021-05-29 03:14:58 -07:00
Priyanka Gujjula
f0556555c7 msm: vidc: Allow adaptive B frame encode for hevc
Both H264 and HEVC can support adaptive B frame
encoding.

Change-Id: I4b51a224d9ed9bb173f40ea5c4c919ff2800a85c
2021-05-24 15:04:35 +05:30
qctecmdr
d435c9e7f1 Merge "msm: vidc: Resolve compilation erorr on 32bit device" 2021-05-06 20:55:14 -07:00
qctecmdr
797c9a6a15 Merge "msm: vidc: fix memory leak in open/close" 2021-05-02 01:04:47 -07:00
Anand Abhishek
f537e62907 msm: vidc: Resolve compilation erorr on 32bit device
Division(/) and modulus(%) are failed to link on 32-bit kernel.
To resolve the linker error, use API for division and modulus which
are available for both 32bit and 64bit architecture.

Change-Id: Ib45b993c5ec4eee45d5f50e0d7b6d4831c256d8c
2021-04-27 22:52:40 -07:00
qctecmdr
38853169b3 Merge "msm: vidc: Add check for maximum height" 2021-04-16 20:03:47 -07:00
Laisheng Hu
15964d6663 msm: vidc: fix memory leak in open/close
refbufs should be destroyed in vidc close.

CRs-Fixed: 2846268
Change-Id: Ic36b7ac824a6c46524b0c4f0ca364e9c87f015ba
Signed-off-by: Laisheng Hu <laisheng@codeaurora.org>
2021-04-16 16:43:50 +05:30
Vikash Garodia
8f2e5d7832 msm: vidc: Add check for maximum height
While accepting a video session, keep a check
for frame height w.r.t maximum capability.

CRs-Fixed: 2883699
Change-Id: I068dd9af868093dbdddf0301d8d40a95643314e0
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2021-03-24 11:31:46 +05:30
Priyanka Gujjula
26782be248 msm: vidc: Allocate required bin size for >=UHD enc
Allocate equal bin size across all the pipes for
encoder >=UHD

Change-Id: Id6a4c2bda50da2bbd81e968be22b76bada51449a
2021-03-22 20:07:25 +05:30
qctecmdr
6b5756c37a Merge "msm: vidc: Update BW calc for yupik" 2021-03-07 21:05:46 -08:00
Priyanka Gujjula
b28166cbf0 msm: vidc: Release scratch buffers of size 0 during reconfig
Release the existing scratch buffers instead of reuse,
provided the new buffer requirements is of size zero.
For ex, scratch buffer for interlace clips is zero.

Change-Id: Ic540839f1b5f8063ae5a1e4eda6df90b60b49af5
2021-03-02 16:52:57 +05:30
Qiwei Liu
36f3788ea4 msm: vidc: enable hdr10 sei only when client set it
For HLG HDR recording, client won't set HDR10 SEI,
and driver shouldn't set this info to firmware either.
Otherwise some applications may have wrong behavior
when HDR10 SEI is present in HLG clips.

Change-Id: I7a054ded39e3b9309d823e97da039f0de1bcde9d
Signed-off-by: Qiwei Liu <qiweil@codeaurora.org>
2021-02-23 17:36:04 +08:00
Priyanka Gujjula
fc3bb5ec5e msm: vidc: Update BW calc for yupik
1. Update BSE TLB read calculation
   for H264 decoder
2. Update vertical_tile_width value
   for encoder

Change-Id: Id9adfbaeb1acce3e40113d48e48395e7882d2516
2021-02-19 12:45:33 +05:30
Priyanka Gujjula
5d09f02e14 msm: vidc: Update BSE TLB write for H264 dec
BSE TLB write is half of TLB read for H264
decoder

Change-Id: Ifbe3ef1a6e6f827f4bcc7a15e1ff0a0df3f8ce12
2021-02-16 11:55:24 +05:30
qctecmdr
4958a3194b Merge "msm: vidc: Update level for avc enc/dec" 2021-01-31 19:45:14 -08:00
qctecmdr
16fee42e37 Merge "msm: vidc: add work_mode and latency debug info for holi" 2021-01-31 19:45:14 -08:00
Govindaraj Rajagopal
fd0413602c msm: vidc: add work_mode and latency debug info for holi
Automation scripts expects work_mode and low_latency config
related debug prints to evaluate testcase pass/fail. So
added debug prints for holi.

Change-Id: I8ab051e0efbb8c8e78a9085e2fc79e7fe43e9c99
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2021-01-29 14:29:43 +05:30
Priyanka Gujjula
12a4382184 msm: vidc: Increase dec batching spec for Yupik
Update decode batching spec for yupik to 1080p@60.

Change-Id: I87d73872655ebfc0afb38862ff5e7c3324dac83e
2021-01-28 15:26:41 +05:30
Priyanka Gujjula
8c49286d81 msm: vidc: Update level for avc enc/dec
Update level for enc on both the SKU's
Update level for dec on 4k@30 dec SKU.

Change-Id: I6c4c2d55179e154afcd54bb362f47aeab4189bba
2021-01-23 16:11:11 +05:30
qctecmdr
ebf596abda Merge "msm: vidc: Increase 10-bit enc o/p buffer size for <=360p" 2021-01-16 06:28:33 -08:00
Priyanka Gujjula
5bf127b94f msm: vidc: Increase 10-bit enc o/p buffer size for <=360p
Increase 10-bit enc bistream buffer size for <=360p.
For 8-bit YUV size : w x h x 1.5
For 10-bit YUV size : w x h x 1.5 x 2

Change-Id: I6fddcf960b8b06fe6edbe4b8262374303a045530
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2021-01-08 19:33:51 +05:30
qctecmdr
7431a0eb77 Merge "msm: vidc: Amend DCVS handling for encoder" 2021-01-08 01:45:26 -08:00
Vikash Garodia
76cae5a345 msm: vidc: Amend DCVS handling for encoder
For DCVS, there are mainly 3 buffer count watermarks
i.e low, normal, high. When the buffers held with firmware
goes above high or below low, DCVS changes the clock to
high or low respectively.
At this state, to come back to normal clock, it needs the buffer
in firmware to come back to normal count. For cases, when DCVS
decides to decrease the clock, the clock remains lowered till
the buffer count in firmware is back to normal. During this
phase, the clock remains low and impacts performance. Since
encode usecase always desire more clock, keeping low for them
leads to measurable impact.
The fix considers a case for encoder to bring back to normal
clock when the buffer count is more than low watermark.

CRs-Fixed: 2845570
Change-Id: I426a17f7b16db544ea09ec072c77e95198634c84
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2021-01-07 12:53:48 +05:30
Priyanka Gujjula
83b35fa14a msm: vidc: Update offset for yupik FMAX fuse
Update offset from 14 to 21 for yupik fmax fuse.
IRIS_PLL_FMAX: Limits the enc/dec capability to
4k@30.

Change-Id: I60dc110e85a5aa7d4427424b401b759e49d345ac
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2021-01-06 11:20:51 +05:30
qctecmdr
0dee8c8f6b Merge "msm: vidc: yupik: Add platform data" 2021-01-03 02:48:05 -08:00
Priyanka Gujjula
66265b505b msm: vidc: yupik: Add platform data
Add driver platform data for yupik
yupik_v0: 4k@60 Dec, 4k@30 Enc
Concurrency: 4k@30 Dec + 1080p@30 Enc
yupik_v1: 4k@30 Dec/Enc
Concurrency: UHD@30 Dec + 1080p@30 Enc
DDR5 UBWC3.0 HBB value: 15
DDR4 UBWC3.0 HBB value: 14

Change-Id: Ia33befb5eb9694fe7eded7b0bed662c0c406c6e9
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2020-12-22 20:37:24 +05:30
qctecmdr
bb47cc0740 Merge "msm: vdec: update clock data frame rate" 2020-12-21 19:34:24 -08:00
qctecmdr
1fdde7ec26 Merge "msm: vidc: Update encoder o/p buffer size calc" 2020-12-21 19:34:24 -08:00
Shi Zhongbo
cf15569f3d msm: vdec: update clock data frame rate
Update clock data frame rate to client's set value
for mbps calculation so as to reject sessions out of
mbps capability.

Change-Id: I62559172b71fb4d2e911c16be7f07110e53f23a1
Signed-off-by: Shi Zhongbo <zhongbos@codeaurora.org>
2020-12-17 22:24:10 -08:00
Priyanka Gujjula
e8004219db msm: vidc: Fix criteria for hierp num_ref calc
[1] num_ref for hierp has to be calculated only if
    max_layer value is > 1. Since max_layer value
    0/1 indicates absence of layer encoding.
[2] Fix hybrid_hp num_ref calculation inline with
    FW calc.

Change-Id: I507d58c33529e5976974cc2d5a6e2d3fd8c55026
2020-12-15 18:39:02 +05:30
qctecmdr
9fa40378bf Merge "msm: vidc: Fix mbpf calculation for active session" 2020-12-11 05:41:14 -08:00
Priyanka Gujjula
9aa7ae0ed1 msm: vidc: Update encoder o/p buffer size calc
Update enc o/p buffer size calc inline with
FW calculations.

Change-Id: Ie5aae40cb51909446430b7b8d5ff9405bbcd7f8b
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2020-12-10 20:44:17 +05:30
Shi Zhongbo
8929fa4bcc msm: vidc: limit max and min auto frame rate
Limit auto frame rate to [1,platform frame rate capability]
before sending to firmware.

Change-Id: I96dc4b8d76b7752a76f6c15dcb6b20817857372f
Signed-off-by: Shi Zhongbo <zhongbos@codeaurora.org>
2020-12-09 10:32:15 +08:00
qctecmdr
08a5f090b1 Merge "msm: vidc: update all intra to allow more than 30 fps" 2020-12-05 23:36:53 -08:00
qctecmdr
434d01ee17 Merge "msm: vidc: avoid access to unwanted register" 2020-12-05 15:12:18 -08:00
qctecmdr
bf4ebfcb5b Merge "msm: vidc: Update num_ref calc and limit max_layer" 2020-12-05 10:32:17 -08:00
Vikash Garodia
a30dfea155 msm: vidc: avoid access to unwanted register
While processing the response from video hardware, video
driver is accessing a register which does not exist. It
is even not needed for functionality purpose. Removing
the access for the same.

Change-Id: Ib4fec718d2f057860878bf8928b96fb46be47b13
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2020-12-03 14:11:43 +05:30
Vikash Garodia
ae4c88ee64 msm: vidc: update all intra to allow more than 30 fps
Certain clients enables all intra tests for 720p @42 fps.
To allow such configuration, which is within the allowed
specification, extend the capability.

Change-Id: I0a0247e95bb040635c92404c5a342c92c340154c
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2020-12-03 13:51:24 +05:30
Govindaraj Rajagopal
3cd260e651 msm: vidc: return appropriate error code for overload errors
Return -ENOMEM instead of -EBUSY for hardware overload errors.

Change-Id: I3b1c54e2035969c929bb2fdaea9e981e9c43ab32
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-12-02 20:09:40 +05:30
qctecmdr
1eddbdadbd Merge "msm: vidc: move inline functions into header file" 2020-11-30 23:46:57 -08:00
qctecmdr
ec1453ba71 Merge "msm: vidc: print only memory usage" 2020-11-30 07:31:20 -08:00
Govindaraj Rajagopal
395da1fe6e msm: vidc: move inline functions into header file
It's better to put inline function in header files
If not, gcc would complain "function body not available".

Change-Id: I81c363dc96bb4135593087e726d7a872b1bc3451
Signed-off-by: Jean Xiao <jianxiao@codeaurora.org>
2020-11-27 16:56:38 +05:30