Commit Graph

351 Commits

Author SHA1 Message Date
qctecmdr
64b8aeed58 Merge "msm: ipa3: Adding chnages to update event RP from DDR" 2021-05-05 06:28:09 -07:00
qctecmdr
806108499c Merge "msm: ipa3: Changes to check disconnect in progress while sending data" 2021-05-05 05:00:58 -07:00
Sivan Reinstein
e2030525a3 msm: gsi: add gsi profiling stats registers
Add GSI profiling stats register addresses

Change-Id: I38f5a27e97430e7597ab1bdc2141303add59dbb0
Acked-by: Nadav Levintov <nadavl@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
2021-05-05 08:04:45 +03:00
Ashok Vuyyuru
b1e7c45a8c msm: ipa3: Changes to check disconnect in progress while sending data
In SSR scenario while teardown the pipe there could be possibility to
receive the UL data to avoid queuing the data checking for disconnect
InProgress flag.

Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Change-Id: I73397e51e6e7affae71313d08356f809788db484
2021-05-04 16:42:26 +05:30
Ashok Vuyyuru
613398d2ae msm: ipa3: Changes to read the halt command return code after some delay
In some cases for updating the return code in SCRATCH register taking
time after raising the global interrupt. Adding changes to wait for
some time read the SCRATCH register again and also printing the
test bus registers and Q6 channel state in failed scenario.

Change-Id: I4112a2290739daa79629f718d9725258518aba4c
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-05-03 22:54:26 +05:30
Ashok Vuyyuru
9d8b6ff21b msm: ipa3: Adding chnages to update event RP from DDR
In suspend scenario while checking channel empty scenario
updating the event ring RP pointer from direct register, it
may cause mismatch in reading in polling context. To avoid
discrepancy  reading RP pointer DDR location.

Change-Id: Ie198ea9ace033e31463acd974f10dccdcac45c55
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-05-03 17:59:58 +05:30
qctecmdr
e74ef50626 Merge "techpack: dataipa: Enable Regdump for msmnile" 2021-04-30 08:30:12 -07:00
Praveen Kurapati
0393a19b6d msm: ipa3: Add smp2p changes for modem load FW
Add changes wrt SMP2P for modem loading the IPA FW.

Change-Id: I41d42b044d7f9020c4ff9932406bf8fb6f55db6b
Signed-off-by: Praveen Kurapati <pkurapat@codeaurora.org>
2021-04-28 19:52:18 +05:30
qctecmdr
d1423053e4 Merge "msm: gsi: add gsi profiling stats and fw version to debugfs" 2021-04-27 05:09:14 -07:00
qctecmdr
de476aa837 Merge "ipa: save registers on graceful shutdown" 2021-04-26 22:59:16 -07:00
Akshay Pandit
1c9ee39e90 techpack: dataipa: Enable Regdump for msmnile
Enable support to save regump for msmnile target.
Change-Id: I47add92e8eb82a546d4217815699fccd52b7b5b8
2021-04-27 10:38:02 +05:30
qctecmdr
c3b5765c0c Merge "msm: ipa3: Adding BW monitor and QUOTA support for yupik target" 2021-04-26 21:31:48 -07:00
Sivan Reinstein
7117d2256a msm: gsi: add gsi profiling stats and fw version to debugfs
Add GSI profiling stats data and the GSI FW version to debug fs.

Change-Id: I5749339f5ec9656e636a512668025bb09a97a3ec
Acked-by: Nadav Levintov <nadavl@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
2021-04-26 16:26:45 +03:00
Armaan Siddiqui
1d895c493c ipa: save registers on graceful shutdown
Save registers
- when gsi channel setup fails in post init
- on graceful shutdown
Handle printing registers when ipahal is not intialized.
2021-04-20 06:46:02 -07:00
Ashok Vuyyuru
7296789b5e msm: ipa3: Adding BW monitor and QUOTA support for yupik target
Adding FnR stats, BW monitor and QUOTA support for yupik target.

Change-Id: If9b2b2480bb7ece08d906b06b676f63e1e778a2c
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-04-17 00:00:51 +05:30
Ashok Vuyyuru
ad284c7b5f msm: ipa3: configure the HOLB timer value to zero in SSR scenario
configure the HOLB timer value to zero in SSR scenario to avoid
USB stall issue.

Change-Id: I23f91c4a2bff2cb3b330d4354e81acc9460d1936
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-04-05 19:38:58 +05:30
qctecmdr
f875c2c680 Merge "msm: ipa3: Update holb config on WLAN & USB CONS ep." 2021-03-30 06:26:18 -07:00
qctecmdr
b5995859a2 Merge "msm: gsi: Add changes to capture wdi channel health" 2021-03-24 03:29:50 -07:00
Piyush Dhyani
6b83b80412 msm: gsi: Add changes to capture wdi channel health
For wdi channels we have different logic to moniter
channel health as compared to gpi channels. Now
adding changes on existing channel stats api to
capture health for wdi channels.

Change-Id: Ice99e5aee40e3cc30545d2dfd95d6e85007d8c9d
Signed-off-by: Piyush Dhyani <pdhyani@codeaurora.org>
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-03-23 15:38:00 +05:30
qctecmdr
dedd67b092 Merge "msm: ipa: Fix string out of bound issue." 2021-03-18 05:17:44 -07:00
Piyush Dhyani
52eb4e3564 msm: ipa3: Update holb config on WLAN & USB CONS ep.
After configuring WLAN CONS ep or USB ep there is a chance
of IPA hardware stall, if WLAN ep or USB ep is not pulling
data fast enough. So, set holb on WLAN CONS ep and USB CONS
ep to avoid stall.

Change-Id: I370165ce197181eaac999df2d8abea517c9e9bd4
Signed-off-by: Piyush Dhyani <pdhyani@codeaurora.org>
2021-03-16 11:44:06 +05:30
Ashok Vuyyuru
741d97715b msm: ipa3: Use read memory barrier before reading events
Use read memory barrier before reading event from event ring.
Since ring is shared resource between IPA h/w and IPA driver
dma_rmb is used to ensure memory write is complete before
reading from driver.

Change-Id: If2b86ee1acecbdfc75beb327eb60f876e6915d8f
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-03-11 21:12:06 +05:30
qctecmdr
c994c36128 Merge "msm: ipa3: Check channel in right state before access base address" 2021-03-09 00:03:58 -08:00
Ashok Vuyyuru
ee632f5ae2 msm: ipa3: Check channel in right state before access base address
Observing use after free issue during teardown WAN pipe if we
receive the incoming packet. Adding check channel in right state
before access base address.

Change-Id: I29a611693b78637811fe45abea93d9ed3e6f54e5
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-03-08 18:13:08 +05:30
Bojun Pan
3fb34cbda2 msm: ipa: fix the IPA clock vote on non-NAPI case
Fix the potiental addition reference counts issue.

Change-Id: Ib01707ab00db7413c46eee7ccb8d74460344d047
2021-03-05 12:36:06 -08:00
qctecmdr
7de0e10b06 Merge "msm: ipa3: Decrement the IPA clock in delayed workqueue" 2021-03-05 04:15:22 -08:00
Ashok Vuyyuru
0427aca005 Revert "msm: ipa3: enable SYSPIPE_ERR_DETECTION bit for deaggr_err"
This reverts commit 94056932ae.

Change-Id: I9126447fceecaf47c10558f1084f6cf2b9b8c43e
2021-03-04 22:25:18 +05:30
Ashok Vuyyuru
c38f66cafd msm: ipa3: Decrement the IPA clock in delayed workqueue
While handling the suspend interrupt due aggregation timeout
possible to IEOB interrupt will be delayed. To handle this
scenario adding changes to decrement clock in delays work queue.

Change-Id: I4b9afebf5a9582f6c94aa5a9cd2eb0904b7171b8
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-03-04 18:51:10 +05:30
qctecmdr
18b9188983 Merge "msm: ipa3: enable SYSPIPE_ERR_DETECTION bit for deaggr_err" 2021-03-03 02:40:59 -08:00
qctecmdr
16cfae0208 Merge "msm: ipa3: Updating SRAM locations for holi" 2021-03-01 13:44:30 -08:00
qctecmdr
58a7169d7d Merge "msm: ipa3: Fix to null pointer access" 2021-02-26 06:42:15 -08:00
Ashok Vuyyuru
a52dbc8242 msm: ipa3: Fix to null pointer access
After PM client deregister trying to access the PM handle causing the
NULL pointer access. Adding changes to avoid NULL pointer access.

Change-Id: Ieee7864989e8c54f09c8df659bfc91dca8e89b3b
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-02-26 00:20:40 +05:30
Ashok Vuyyuru
94056932ae msm: ipa3: enable SYSPIPE_ERR_DETECTION bit for deaggr_err
We observe the IPA RX stall due to the DEAGGR_ERR_IRQ
of PACKET_SIZE > FRAME_SIZE on WAN PROD pipe.
In IPA, some of de-aggregation error handling checks
are dependent on the syspipe_err_detection config bit.
Adding IGNORE_MIN_PKT_ERR bit for WAN PROD as well based
on recommendations.

Change-Id: Ie0fe8f52a1e63750e3db7f2b3fcf42790505fa88
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-02-23 22:52:27 +05:30
Ashok Vuyyuru
e50cabeddd msm: ipa3: Updating SRAM locations for holi
Updating SRAM locations according to excel sheet for holi target.

Change-Id: I2fc011d4980f25f74f7c96448b033f61fdea9639
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-02-23 16:06:35 +05:30
qctecmdr
ad00176868 Merge "msm: ipa3: Changes to check return code after halt command timeout" 2021-02-18 07:00:18 -08:00
Michael Adisumarta
db9f7f48ee msm: ipa: Add a check to see if mtu is set or SET_MTU IOCTL
Add an check for mtu set before sending an event to IPACM
so MTU will always be nonzero.

Change-Id: Ib8954865ba46743e143d72cf15d8bbce282aa013
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-02-11 14:43:26 -08:00
Ashok Vuyyuru
10a68ad751 msm: ipa3: Changes to check return code after halt command timeout
After halt command timeout verify return code to check command
operation completed or not. If return code success continue further
otherwise return error.

Change-Id: I07ac56d5200163d7d1f8087ce807cd6cd4ebcebc
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-02-10 21:44:44 +05:30
raghavendar rao l
839d05d11b msm:qmi: Fix race condition
Add changes to fix race condition while sending
modem init QMI sync message.

Change-Id: I2183dd2da40b589ccd628469273b33edc2ea399d
Signed-off-by: Raghavendar rao l <rlomte@codequrora.org>
2021-02-04 21:09:14 +05:30
Ashok Vuyyuru
1719235112 msm: ipa3: Change to avoid the assert channel not allocated scenario
When the modem channel not running if try to flow control the channel
it will return not valid channel. Adding change to avoid the assert
in this error condition.

Change-Id: Ia9c32fbc11814e5fef3b7fbcc165439b5d03b2fa
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-02-03 16:12:26 +05:30
qctecmdr
19465a1510 Merge "msm: ipa3: uC stats feature not support for yupik target" 2021-02-01 03:13:11 -08:00
Ashok Vuyyuru
95bcacd2ad msm: ipa3: uC stats feature not support for yupik target
uC stats feature not support for yupik target so disabling
this API calling support.

Change-Id: Iebd074f7cd5d4b57b8db3dc137684dbfc6317e0e
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-01-30 10:40:00 +05:30
Ashok Vuyyuru
a1eb2af1f0 msm: ipa3: Adding wdii3 client support for yupik
Adding wdi3 endpoint client support for yupik.

Change-Id: I0f9f98dbf80dfa40c3f9528ec958ba4cf6326633
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-01-30 10:32:20 +05:30
qctecmdr
8f5f141b1e Merge "msm: ipa: enable WARN_ON only for debug builds" 2021-01-21 21:13:46 -08:00
qctecmdr
114feaa6a8 Merge "msm: ipa: fix race condition on PM vote on sys pipes" 2021-01-21 18:13:48 -08:00
Bojun Pan
cfad44940c msm: ipa: fix race condition on PM vote on sys pipes
There is race condition on PM defer deactive and PM active where
the PM active triggered by new NAPI scheduling would be accidently
unvoted by PM defer deactive after last NAPI completion. This
is causing the NoC error on packet handling due to no clock.
The fix here is to using ACTIVE_CLIENT_NO_BLOCK for clock voting
and still use PM handle for BW voting so that we would have
reference count to make sure this unexpected devote not happens.

Change-Id: If1ece48dc16256dae9a810b3efa6eb4f533f06a8
2021-01-21 12:58:20 -08:00
qctecmdr
b5ddc2efd0 Merge "msm: ipa3: immediately return after rx_len is cached." 2021-01-19 22:06:45 -08:00
qctecmdr
bbf70405ea Merge "msm: ipa3: Define gsi scratch reg 1 for gsi v1 targets" 2021-01-13 00:04:49 -08:00
qctecmdr
abbf862f97 Merge "msm: gsi: Updated the wait for completion time out" 2021-01-12 22:39:51 -08:00
Michael Adisumarta
56e4ab58b7 msm: ipa3: immediately return after rx_len is cached.
This is to avoid race condition.

Change-Id: I5d86081025508a25f669eca82c8750306e2c6fc3
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-01-12 21:16:10 -08:00
raghavendar rao l
2d91294e6a msm: gsi: Updated the wait for completion time out
Increased the wait for completion timeout period,
while performing channel halt.

Change-Id: I42d56480d815e5ba6deb5c68ec2a9ba43cea39f7
Signed-off-by: raghavedar rao l<rlomte@codeaurora.org>
2021-01-12 09:48:53 +05:30