Avoid updating the rsc state to solver mode for video mode panels
on targets with rsc version 3 and up.
Change-Id: I238f130c914c8c845c172746cc2025acd37840d3
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Power handle's interconnect interface assumes all interconnects
contain a reg bus entry, but RSC does not require one. Change
the logic to only report interconnect failure if the reg bus
node exists in the device node.
Change-Id: Ia4b1cfd1c482a9674b6a29d07483e801ac20a67c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
When switching from CMD to VIDEO or vice-versa, HW no longer
requires a vsync wait in between since the vsyncs will be
synchronized. So skip the wait for HW which supports this
feature.
Change-Id: Ia5823495bc7bfc7d590098775b0a5f4b4347b5ed
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Add support for enabling and reading profiling counters via
debugfs. This change also introduces RSC rev 4 (first rev
supporting profiling counters), enabling all relevant rev 3
features as well.
Change-Id: I0326215b069a37c91072965379b0b4843916ee0a
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds support for programming SPR hw block as per the
client configuration from the respective color property blob.
Currently only reg dma accelerated path is provided.
Change-Id: Ib8559ec2c392be7b69ca43c6364e701fab877a28
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Currently driver clients are not setting the last value of the igc
table. As a temporary change setting it to 4095, once user-space changes
are updated will revert the current fix.
Change-Id: Ifd6e62cd9edf3d1f2917079f639e00aa4ea31cf1
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Previous SB DMA logic was not clearing a "SB DMA active" flag, resulting
in SB DMA incorrectly being flushed every frame. While this logic
matches the DB DMA approach, it is unnecessary and could result in
delayed DB DMA execution.
Update SB DMA logic to clear the "active" flag for the target DSPP
immediately after the SB DMA is flushed.
Change-Id: I3dc0792a50d7dec42cb32bf8cd1e3d0b217cf582
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Gamut registers have been updated in newer version of dpu where the
bit depth of the registers have been updated. Change programs
the values by adjusting for bit depth changes.
Change-Id: Id8d8dc37aff6854d67855b9aa7644d1ca4ec4e6f
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
DSI controller and clock will be disabled/enabled during panel mode
switch, so disallow backlight update during panel mode switch to
avoiding DSI exception.
Change-Id: I37e2f3c9aa929555593ffb53950521150ee7698f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Make sure that cmd dma done mask is set before sending
dma commands. This will make sure that we don't timeout
if the refcnt's are not properly handled. Many oem's
have their own customizations around this which maynot
handle the refcnt's correctly.
Change-Id: If7f5ed1fae20b57f6e9147cae2caa3c5097466c9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For command mode panels, if a dynamic mode switch occurs on
the first frame, the current code skips DSI controller initialization
and registering for error handlers. This causes the software state
to be uninitialized for DSI CTRL, resulting in command transfer
failures and eventual crash. The change ensures that initialization
is complete even if the DMS occurs on first frame.
Change-Id: I83e3336f7c09424b6c7b95826c30b37974ec29ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add this change to ensure that DFPS and RFI happen in the
same panel mode for avoiding unexpected panel mode switch.
Change-Id: I6783b320e73a88e8f75cb83bcce85e50f798b6ab
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Reject composition if panel mode switch is requested
during power on/off commits.
Change-Id: I3a5b28fd9f5bd927537824033a1c8dc838366d5b
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Avoid esd check during pm_suspend state because core
clock enable will fail. This change adds additional
check and also adds the clock enable failure check.
Change-Id: Ie8bfa4f74d323ff15a07fb037675f07ab942f016
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
It should not be an error that panel mode isn't specified
in timing node, so add this change to lower the log level
from error to info.
Change-Id: I49bd1fec1c09697d9829a8e0767dfa3cf2cff512
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For constant fps feature, porch is calculated based on supported
clk rates. Currently, data type of local variables used for porch
calculation is u32 which leads to incorrect porch calculation for
higher clk rates. So, update the data type to u64.
Change-Id: I8eb04487d1dcce05989448c0b063e56752af412b
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add changes to support dynamic switching of dsi clock feature for
phy ver 2.0. This helps to avoid RF interference with DSI clock.
Change-Id: I69958d9224665296cc0f272e39dcdfcefbe293d4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For video mode panels, async wait feature for DCS command
transmission may not always be reliable as additional programming
would be needed to ensure that the DCS commands are correctly scheduled.
Until this feature is properly implemented and validated, disable this
for video mode panels to avoid potential DSI command transfer
failures.
Change-Id: I18c853bc5607cc1cc523b36f6f346b213911c1a9
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Change will be removing checking and clearing dsi cmd done
interrupt in commit thread and in workqueue context, which
can race with dsi isr, when it tries to clear the interrupt.
Change-Id: I96e7f8dffed1af3cec0c7668ab1729337d4b260e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
There is lag or lead in the FPS during dynamic clock change,
along with the increment or decrement in clock. So, HFP or
VFP are adjusted to ensure a constant FPS.
Change-Id: I87ba7a185104a0f5f1d13734a7e487e728d6b2c0
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add Kbuild entries for msm_hdmi_hdcp_mgr.h to ensure that this
uapi header is copied out from display techpack path for
userspace clients to use after kernel compilation.
Change-Id: I0780a1eb9e85badabc58b172d46c73822c2210e3
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This change installs blob property on each crtc for client to program
SPR block configuration based on display panel SPR pattern. Property
installation is conditional only if MDSS hw has SPR block entries.
Change-Id: Ie85423d83b7badc547e75e6eb07ee6b9945f8834
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change defines data structure for user mode program
to configure SPR block of MDSS hw.
Change-Id: Ia4edb5af757541309c50047f4b7476cac8ddd39f
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change parses SPR enable entry from panel device tree and
populates SPR specific information in panel data structure.
Valid entry of SPR pack type is treated as panel requirement
to enable SPR for specified pack type from source end. This change
also populate connector capabilities blob with SPR pack type.
Change-Id: I9d9ab8a990476fba281e12890bf3f7b17a174d79
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change parses SPR hw block entries from device tree and populate
SPR block as sub block of DSPP block. Change also enables register dump
by registering sub blocks with sde driver register dump routine.
Change-Id: Ic603cd3cc001dddce5dfea61341c166a5fec1682
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Update the table with new testpoints added for lahaina.
Change-Id: Ib1253f696e6e670b6dc475cc68a73c8c41ee264b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Upstream has added an "enhancement" to the DMA allocator to
reject coherent allocations less than a a full page, so allocate
device managed memory instead of artificially inflating the
buffer sizes. This has the added benefit of having this memory
automatically freed when the module is unloaded, avoiding
possible leaks.
Change-Id: I653f2cd1f06f1a352cd61e36ea8baaf7c30efd98
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Enable compilation of the DisplayPort driver on Lahaina.
Change-Id: Ie8437c136a2daa0f8119b0a592577e5592ce2142
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Use the new altmode framework to receive the connect, disconnect
and attention events.
Change-Id: Ic542525b526e1abd0f153c293bca6e4cdbb6bf0b
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Add support for PLL programming in the DisplayPort driver.
Change-Id: I4f08a621dcae5d1f54d67bb5c34409249012cc7b
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>