Commit Graph

375 Commits

Author SHA1 Message Date
Paul Mundt
ccd8058741 sh64: Fixup the nommu build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-05-08 19:51:37 +09:00
Paul Mundt
440fc172ae sh: Fix up L2 cache probe.
SH7723 is the first hard silicon to implement the L2, and unsurprisingly,
does the precise inverse of what the specification alleges. XOR the
URAM/L2 size bits to get back in line with the existing parsing logic.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:07 -07:00
Paul Mundt
e5a4c65bef sh: Fix up SH-4A part probe.
The SH-4A series probe we were relying on doesn't work any more on the
newer parts, bump this up to use CVR.CHIP instead so we have consistent
behaviour across all of the parts, which is what this should have been
testing in the first place.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:07 -07:00
Paul Mundt
178dd0cd28 sh: Add support for SH7723 CPU subtype.
This adds basic support for the SH7723 MobileR2 CPU.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:07 -07:00
Paul Mundt
47aa8f493f sh: Fix up SH7763 build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:06 -07:00
Magnus Damm
ef1b2327d2 sh: Add I2C platform data to sh7722
Add platform data for the SuperH Mobile I2C block to sh7722.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:06 -07:00
Magnus Damm
a0d29798e5 sh: Use physical addresses for sh7722 USBF resources
Use physical addresses and change resource name to follow data sheet.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:03 -07:00
Paul Mundt
2163b4cb01 sh: Hook up the rest of the SH7770 serial ports.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:02 -07:00
Paul Mundt
2ad699080b sh: Initial support for the MX-G CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-04-18 09:50:01 -07:00
Paul Mundt
9bbafce2ee sh: Fix occasional FPU register corruption under preempt.
Presently with preempt enabled there's the possibility to be preempted
after the TIF_USEDFPU test and the register save, leading to bogus
state post-__switch_to(). Use an explicit preempt_disable()/enable()
pair around unlazy_fpu()/clear_fpu() to avoid this. Follows the x86
change.

Reported-by: Takuo Koguchi <takuo.koguchi.sw@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-03-26 19:02:47 +09:00
Kieran Bingham
6c0602b8dd sh: Fix up the address error exception handler for SH-2.
Presently the SH-2/SH-2A address error exception dispatch copies off the
register state from the stack and skips over the first register, skewing
the rest. Fix up the math here so that the proper register state is
handed down to the exception handler itself.

Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-03-13 19:43:07 +09:00
Paul Mundt
b2839ed83f sh: Fix up section mismatches.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-03-06 12:43:38 +09:00
Harvey Harrison
866e6b9e50 sh: replace remaining __FUNCTION__ occurrences
__FUNCTION__ is gcc-specific, use __func__

Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-03-06 11:18:22 +09:00
Paul Mundt
96de1a8f02 serial: Move asm-sh/sci.h to linux/serial_sci.h.
This header is needed on other architectures as well (namely h8300),
which currently fails to build without this in place. Rather than
duplicating the port definition completely there, just move this to a
common location instead.

This should get h8300 working again for 2.6.25, in addition to the
changes already pushed by Sato-san in -rc2.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-26 14:52:45 +09:00
Rafael Ignacio Zurita
b7fd095602 sh: fix rtc_resources setup for sh770x
Fix the RTC resources setup for sh770x. Whit these proper
start values RTC driver (drivers/rtc/rtc-sh.c) works.

Signed-off-by: Rafael Ignacio Zurita <rizurita@yahoo.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-26 14:08:29 +09:00
Tobias Klauser
4377e605e0 sh: Storage class should be before const qualifier
The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-26 14:04:17 +09:00
Paul Mundt
cc645a0205 sh: Rename SH-3 CCR3 reg to avoid synclink_cs clash.
drivers/char/pcmcia/synclink_cs.c:284:1: warning: "CCR3" redefined
In file included from include/asm/cache.h:13,
                 from include/asm/processor_32.h:15,
                 from include/asm/processor.h:60,
                 from include/linux/prefetch.h:14,
                 from include/linux/list.h:8,
                 from include/linux/module.h:9,
                 from drivers/char/pcmcia/synclink_cs.c:38:
include/asm/cpu/cache.h:38:1: warning: this is the location of the previous definition

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-25 18:49:44 +09:00
Paul Mundt
38350e0a00 sh: Get SH-5 caches working again post-unification.
A number of cleanups to get the SH-5 cache management code in line with
the rest of the SH backend.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14 14:22:12 +09:00
Paul Mundt
43081e1833 sh: Shut up some trivial build warnings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14 14:22:11 +09:00
Magnus Damm
9109a30e5a sh: add support for sh7366 processor
This patch adds sh7366 cpu supports. Just the most basic things like interrupt
controller, clocks and serial port are included at this point.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14 14:22:10 +09:00
Magnus Damm
d847afe7d4 sh: remove maskreg irq code
This patch removes the maskreg irq code since it is not in use anymore.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14 14:22:10 +09:00
Magnus Damm
1cfb629cfa sh: add probe support for new sh7722 cut
This patch adds support for sh7722 devices with prr value 0xa1.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14 14:22:07 +09:00
Alexey Dobriyan
25478445c4 Fix container_of() usage
Using "attr" twice is not OK, because it effectively prohibits such
container_of() on variables not named "attr".

Signed-off-by: Alexey Dobriyan <adobriyan@sw.ru>
Acked-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-08 09:22:32 -08:00
Yoshihiro Shimoda
4bb70b84bf sh: Add OHCI and UDC platform devices for SH7720.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:19:03 +09:00
Magnus Damm
7f3edee81f sh: intc - remove default interrupt priority tables
This patch removes interrupt priority tables from the intc code.
Optimal priority assignment varies with embedded application anyway,
so keeping the interrupt priority tables together with cpu-specific
code doesn't make sense.

The function intc_set_priority() should be used instead to set the
desired interrupt priority level.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:19:02 +09:00
Andrew Murray
c3aa92afd0 sh: sh7712 clock support
This patch provides specific clock support for the SH7712.

Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:19:02 +09:00
Yoshihiro Shimoda
7d740a066f sh: Add support for SH7763 CPU subtype.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:19:02 +09:00
Yoshihiro Shimoda
31a49c4bf8 sh: Add support for SH7721 CPU subtype.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:19:02 +09:00
Paul Mundt
cd01204b82 sh: Encode L1/L2 cache shape in auxvt.
This adds in the L1I/L1D/L2 cache shape support to their respective
entries in the ELF auxvt, based on the Alpha implementation. We use
this on the userspace libc side for calculating a tightly packed
SHMLBA amongst other things.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:59 +09:00
Stuart Menefy
c8c0a1aba9 sh: Support denormalization on SH-4 FPU.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:59 +09:00
Stuart Menefy
cbaa118ecf sh: Preparation for uncached jumps through PMB.
Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:59 +09:00
Stuart Menefy
1efe4ce3ca sh: GUSA atomic rollback support.
This implements kernel-level atomic rollback built on top of gUSA,
as an alternative non-IRQ based atomicity method. This is generally
a faster method for platforms that are lacking the LL/SC pairs that
SH-4A and later use, and is only supportable on legacy cores.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:58 +09:00
Paul Mundt
a23ba43573 sh: comment tidying for sh64->sh migration.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:58 +09:00
Paul Mundt
4b27c47cf8 sh: syscall auditing for sh5, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:58 +09:00
Paul Mundt
74d99a5e26 sh: SH-2A FPU support.
Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:57 +09:00
Paul Mundt
a8f67f4b4d sh: Add SH7263 CPU support.
This adds support for the SH7263 (SH-2A) CPU.

This particular CPU is a superset of SH7203, adding some additional
peripheral blocks and hooking up additional (reserved on SH7203)
vectors in the INTC block.

No visibly nasty surprises, yet..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:57 +09:00
Paul Mundt
6d01f51086 sh: Add SH7203 CPU support.
This adds support for the SH7203 (SH-2A) CPU.

Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:57 +09:00
Paul Mundt
332fd57b92 sh: Bring the SH-5 FPU in line with the SH-4 FPU API.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:55 +09:00
Paul Mundt
18bc81319b sh: Get the mach-cayman IRQ support building.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:54 +09:00
Paul Mundt
36763b22be sh: Switch SH-5 to use CONFIG_PAGE_OFFSET.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:51 +09:00
Paul Mundt
e88ed82ef8 sh: Stub in CPU subtype setup code for SH5-101/103.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:50 +09:00
Paul Mundt
d183913609 sh: Plug in simple SH-5 subtype probing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:50 +09:00
Paul Mundt
92b59258b8 sh: Kill off do_NMI stub in SH-5 ex table.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:50 +09:00
Paul Mundt
5a4f7c66be sh: Share bug/debug traps across _32 and _64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:50 +09:00
Paul Mundt
600ee240d1 sh: Move over and enable FPU support for SH-5.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:48 +09:00
Paul Mundt
7cfee5ac3e sh: Move over sh64 switch_to and stack unwinder.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:47 +09:00
Paul Mundt
343ac72248 sh: Move over the SH-5 entry.S.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:46 +09:00
Paul Mundt
27a511c6f3 sh: Disable initial cache flush on SH-5.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:43 +09:00
Paul Mundt
c881cbc033 sh: Don't reference UBC code in CPU init on sh64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:43 +09:00
Paul Mundt
cc8eae7f51 sh: imask IRQ depends on sh32.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:43 +09:00
Greg Kroah-Hartman
38a382ae5d Kobject: convert arch/* from kobject_unregister() to kobject_put()
There is no need for kobject_unregister() anymore, thanks to Kay's
kobject cleanup changes, so replace all instances of it with
kobject_put().


Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24 20:40:39 -08:00
Greg Kroah-Hartman
d48b335256 Kobject: change arch/sh/kernel/cpu/sh4/sq.c to use kobject_init_and_add
Stop using kobject_register, as this way we can control the sending of
the uevent properly, after everything is properly initialized.

Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24 20:40:29 -08:00
Paul Mundt
f966918724 sh: Kill off the remaining ST40 cruft.
The ST40 stuff in-tree hasn't built for some time, and hasn't been
updated for over 3 years. ST maintains their own out-of-tree changes
and rebases occasionally, and that's ultimately where all of the ST40
users go anyways.

In order for the ST40 code to be brought up to date most of the stuff
removed in this changeset would have to be rewritten anyways, so there's
very little benefit in keeping the remnants around either.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-11-07 11:13:55 +09:00
Paul Mundt
96a8a0ba12 sh: Fix up kgdb-on-NMI branch target.
This was all reworked some time ago, the old debug_enter was ripped
out with everything going through a debug trap jump table instead.
Kill off the debug_enter target and reference kgdb_handle_exception
directly.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-11-07 11:13:55 +09:00
Paul Mundt
b2078fa221 sh: Kill off dead ipr_irq_demux().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-10-31 15:17:03 +09:00
Yoshihiro Shimoda
262feaa08e sh: Add resource of USBF for SH7722.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-10-30 13:05:31 +09:00
Stuart Menefy
24eb17e081 sh: clkfwk: Support multi-level clock propagation.
Currently clock propagation only works for one level, but we have some
clocks which need to propagate multiple levels, so make this recursive.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-28 11:51:52 +09:00
Paul Mundt
675bd7804c sh: Fix URAM start address on SH7785.
Not all of the SH-X2 URAM blocks are mapped in the same place,
SH7785 happens to map it on the opposite end of the address space
from SH7722, correct the addresses.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27 18:22:21 +09:00
Paul Mundt
cb7af21f7d sh: Use boot_cpu_data for CPU probe.
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.

This also allows for some header tidying.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27 18:18:39 +09:00
Paul Mundt
f72abd0a4c sh: Fix plat_irq_setup_pins() for SH7785.
There was some debug code left in here that caused the pin changes
to never be hit. Kill that off, and all is well.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27 16:45:46 +09:00
Paul Mundt
26fad19d8c sh: Disable L2 reporting for present URAM only parts.
The probing logic works for both URAM and L2, with no way to
distinguish between the two. Disable the probing for now and
let the CPU subtypes that have this in a real L2 configuration
explicitly say so.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27 10:29:58 +09:00
Paul Mundt
1a442fe02d sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).

More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 19:16:05 +09:00
Magnus Damm
ceb9b97451 sh: Hook up the SH-X3 SMP intc register groups.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 18:34:48 +09:00
Paul Mundt
aba1030a7e sh: Bring SMP support back from the dead.
There was a very preliminary bunch of SMP code scattered around for the
SH7604 microcontrollers from way back when, and it has mostly suffered
bitrot since then. With the tree already having been slowly getting
prepped for SMP, this plugs in most of the remaining platform-independent
bits.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 18:32:32 +09:00
Magnus Damm
f18d533e3c sh: intc - initial SMP support.
This implements initial support for the SMP INTC (particularly
INTC2) controllers.

These are largely implemented as conventional blocks, with
register sets grouped together at fixed strides relative to
the CPU id.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 18:16:42 +09:00
Paul Mundt
db2504966c sh: Wire up URAM node on SH7785.
Add SH7785 URAM as node 1, follows the SH-X3 change.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:55 +09:00
Paul Mundt
35f3abe976 sh: INTC stubs for SH7343 and SH7770 builds.
Get the SH7343 and SH7770 stuff linking again. Both of these still
require proper INTC support.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:53 +09:00
Magnus Damm
953c8ef250 sh: intc - irl mode update for sh7780 and sh7785
This patch contains the following fixes and improvements:
- Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780.
- Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking.
- Good old IRQ_MODE_IRLnnnn should not register any intc controller.
- plat_irq_setup_pins() now selects IRL or IRQ mode.
- the holding function is now disabled using ICR0.

By default all external pin interrupts are disabled.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:51 +09:00
Magnus Damm
1254d1db11 sh: remove CONFIG_CPU_HAS_INTC_IRQ
All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:51 +09:00
Paul Mundt
b05d1865b4 sh: Kill off volatile silliness in sq_flush_range().
CC      arch/sh/kernel/cpu/sh4/sq.o
arch/sh/kernel/cpu/sh4/sq.c: In function 'sq_flush_range':
arch/sh/kernel/cpu/sh4/sq.c:65: warning: passing argument 1 of 'prefetch' discards qualifiers from pointer target type

This didn't actually need to be volatile in the first place, so just
kill off the qualifier entirely.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:51 +09:00
Magnus Damm
2eb0303c2c sh: intc - add support for sh7206
This patch converts the cpu specific interrupt setup code for sh7206
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
0dc3fc04dd sh: intc - add support for sh7619
This patch converts the cpu specific interrupt setup code for sh7619
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
c4773bc2a0 sh: fix irqs for the second serial port on sh7206
This patch makes sure the serial port interrupt irqs matches the
datasheet.  Only irqs for SCIF1 are changed. While at some cosmetic
spaces are added.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
3d37d94e5a sh: intc - primary priority masking fixes
This patch contains various intc fixes for problems reported by
Markus Brunner on the linuxsh-dev mailing list:

http://marc.info/?l=linuxsh-dev&m=118701948224991&w=1

Apart from added comments, the fixes are:

- add intc_set_priority() function prototype to hw_irq.h
- fix off-by-one error in intc_set_priority()
- make sure _INTC_WIDTH() is set for primary priority masking

Big thanks to Markus for finding these problems. Version two fixes
a compile error and an inverted primary check.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
5c37e02535 sh: intc - mark data structures as __initdata
With the intc core improved it is now possible to put the intc data
structures in the initdata section.

Version two of this patch puts the __initdata inside DECLARE_INTC_DESC()
and removes the __initdata included in the board specific r2d code.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
46420e49c9 sh: x3 - add ipi vectors
With the intc dual prio register support in place it is now possible
to add the ipi vectors to x3.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
73505b445d sh: intc - rework core code
This patch reworks the intc core, implementing the following features:

- Support dual priority registers - one set and one clear register
- All 8/16/32 bit register combinations are now supported
- Both single mask and single enable bitmap register are supported
- Add code to set interrupt priority
- Speedup sense and priority configuration code
- Allocate data using bootmem, allows intc data structures to be
  __initdata
- Save memory - allocated memory footprint is smaller than intc
  structures

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
6ef5fb2cfc sh: intc - add a clear register to struct intc_prio_reg
We need a secondary register member in struct intc_prio_reg to support
dual priority registers used by ipi on x3.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Magnus Damm
d6aee69ca1 sh: x3 - fix setup_bootmem_node() compile error with shx3_defconfig
This makes sure the function prototype for setup_bootmem_node() gets
included. The file setup-shx3.c does not compile otherwise for
CONFIG_NUMA=n.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Markus Brunner
3ea6bc3de4 sh: Add SH7720 CPU support.
This adds support for the SH7720 (SH3-DSP) CPU.

Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Paul Mundt
d3428e9101 sh: Wire up CSM node for SH-X3.
Now that NODES_SHIFT is bumped up, we can plug in the CSM block as
a separate node, too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Paul Mundt
6d64d4256c sh: intc: Fix sense regs oops for IRL IRQs.
IRL doesn't always define sense registers, so don't bother trying to
iterate through the table. This ended up causing an oops on SH-X3
when using IRL mode.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:48 +09:00
Magnus Damm
96290d808f sh: remove intc2 code
There is no point in keeping around the now unused intc2 code.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:48 +09:00
Magnus Damm
51da64264b sh: intc - add single bitmap register support
This patch adds single bitmap register support to intc. The current
code only handles 16 and 32 bit registers where a set bit means
interrupt enabled, but this is easy to extend in the future.

The INTC_IRQ() macro is also added to provide a way to hook in
interrupt controllers for FPGAs in boards or companion chips.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
2635e8558a sh: intc - remove redundant irq code for shmin
This patch removes redundant interrupt code for the shmin board which
is using a sh770x processor and 4 IRQ lines as individual interrupts
(IRQ-mode).

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
d59645d6ba sh: intc - remove redundant irq code for sh03, snapgear and titan
This patch removes redundant board specific interrupt code for boards
using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode"
aka IRLM.

Three boards are affected: sh03, snapgear and titan.

The right way to do this is to use cpu specific code provided by intc.
A nice side effect is that sh03 now compiles, board not BROKEN any more.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Paul Mundt
ad89f87a84 rtc: rtc-sh: Support 4-digit year on SH7705/SH7710/SH7712.
All SH-4 parts have a 4-digit year, while the SH-3 parts typically
only use a 2-digit one. The SH7705, SH7710, and SH7712 SH-3 parts
however opted to extend it to 4-digit and still look and act like
an SH-3 RTC in all other ways.

This adds a capability flag (RTC_CAP_4_DIGIT_YEAR) that these
corner-case CPU subtypes can set in their platform data and cleans
up some of the ifdef mess in the driver as a result.

Reported-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Paul Mundt
7da3b8ef66 sh: Initial multiple-node support for SH-X3.
Wire up CPU#0 URAM as node 1 on SH-X3.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
1ee010087e sh: intc - add support for x3
This patch converts the cpu specific interrupt setup code for x3 from
intc2 to intc. New vectors are also added to match the preliminary
information.

Use plat_irq_setup_pins() to select between IRQ and IRL mode for IRQ0-3.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
137b53b71c sh: intc - fix IRQ4 and IRQ5 typo on sh3
The intc tables for sh3 currently contain a typo where the bit
fields in IPRD are mixed up for IRQ4 and IRQ5. This patch makes
sure the correct bit fields are used - all according to the
datasheets.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
e29bfbc443 sh: intc - add support for SH7760
This patch converts the cpu specific interrupt setup code for sh7760
from ipr + intc2 to intc. New vectors are also added to match the
information provided by the datasheet.

Vectors for IRQ4-IRQ7 are enabled by default. Use plat_irq_setup_pins()
if pins IRL0-3 should be used in IRLM mode.

The patch also adds the SIM block to the serial port platform data.
Version two of this patch fixes MMCIF problems reported by Manuel Lauss.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:46 +09:00
Magnus Damm
a0e23267d4 sh: intc - add support for SH7785
This patch converts the cpu specific interrupt setup code for sh7785
from intc2 to intc. New vectors are also added to match the information
provided by the datasheet.

No IRQ/IRL pin vectors are enabled by default. Use plat_irq_setup_pins()
to select between IRL and IRQ mode.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:46 +09:00
Paul Mundt
e7bd34a15b sh: Support explicit L1 cache disabling.
This reworks the cache mode configuration in Kconfig, and allows for
explicit selection of write-back/write-through/off configurations.
All of the cache flushing routines are optimized away for the off
case.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:46 +09:00
Magnus Damm
ac919986d7 sh: intc - avoid SH7710 specific vector on SH7712
This patch makes sure that the sh7710 specific ipsec vector is missing
if building for a sh7712. All according to the datasheet.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:46 +09:00
Magnus Damm
1301e71562 sh: intc - add missing vectors for SH7707
This patch adds a few missing vectors for sh7707. The only interrupt
controller differences between sh7707 and sh7709 seem to be added
vectors for one LCD controller and two PCMCIA slots.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:46 +09:00
Magnus Damm
ec58f1f32d sh: intc - add support for SH7706, SH7707, SH7708, SH7709
This patch unifies the cpu specific interrupt setup code for
sh7706, sh7707, sh7708 and sh7709 and moves the code into a new
file called setup-sh770x.c.  It makes sense to share the setup code
between these processors because most hardware blocks are identical
from a software point of view. With this patch the sh770x processors
now have a complete set of vectors that match with the information
provided by the data sheets. This is a big improvement for sh7708.

Vectors for IRQ4 and IRQ5 are enabled by default. Use
plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.

This patch also unifies the platform device setup code which means
that the rtc driver now has platform data for all sh770x processors.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:46 +09:00
Magnus Damm
28b146c84e sh: intc - add support for SH7710
This patch converts the cpu specific interrupt setup code
for sh7710 from ipr to intc. While at it new vectors are added
to match the information provided by the datasheet. Version two
simplifies the Kconfig part.

Vectors for IRQ4 and IRQ5 are enabled by default. Use
plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.

This patch also adds sh7710 specific platform data for the rtc
driver. The base address of SCIF1 is adjusted to match the
datasheet.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:45 +09:00
Magnus Damm
70e8be0a4e sh: intc - add support for SH7705
This patch converts the cpu specific interrupt setup code for
sh7705 from ipr to intc. While at it new vectors are added to
match the information provided by the datasheet.

Vectors for IRQ4 and IRQ5 are enabled by default.

Use plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.

This patch also adds sh7705 specific platform data for the rtc driver.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:45 +09:00
Magnus Damm
b58d134c7f sh: missing symbol fix for sh4-202
This patch adds a plat_irq_setup() symbol for sh4-202. Without
this fix it is impossible to build a working kernel using the
microdev_defconfig.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-08-22 13:32:07 +09:00
Paul Mundt
c347d12cd1 sh: Fix lockdep debugging oops on SH-3/4.
In the SH-3/4 TLB access violation path we were enabling IRQs before
the call in to trace_hardirqs_on(), which ended up triggering:

        if (DEBUG_LOCKS_WARN_ON(!irqs_disabled()))
                return;

in kernel/lockdep.c:2031. Fix this up by removing the early re-enable,
we were already re-enabling IRQs post-trace_hardirqs_on() already, so
the semantics are now as was initially intended.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-08-01 16:17:07 +09:00
Magnus Damm
d89ddd1c84 sh: remove support for sh7300 and solution engine 7300
This patch removes old dead code:
- kill off sh7300 cpu support
- get rid of broken solution engine 7300 board support

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-26 15:37:57 +09:00
Paul Mundt
b067c50a7f sh: Silence sq compile warning on sh4 nommu.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-26 15:35:17 +09:00
Magnus Damm
870e8a2438 sh: remove support for sh73180 and solution engine 73180
This patch removes old dead code:
- kill off sh73180 cpu support
- get rid of broken solution engine 73180 board support

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-25 10:49:21 +09:00
Magnus Damm
347b9bdddb sh: remove old broken pint code
The code in arch/sh/kernel/cpu/irq/pint.c doesn't compile, so let's
get rid of it to make space for a future pint implementation on top
of intc.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-25 10:46:32 +09:00
Magnus Damm
56386f6424 sh: intc - add support for SH7750 and its variants
This patch converts the cpu specific 7750 setup code to use the
new intc controller. Many new vectors are added and multiple
processor variants including 7091, 7750, 7750s, 7750r, 7751 and
7751r should all have the correct vectors hooked up.

IRLM interrupts can be enabled using ipr_irq_enable_irlm() which
now is marked as __init.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 18:44:49 +09:00
Paul Mundt
fe04d7798f sh: Support rate rounding for SH7722 FRQCR clocks.
Now that the round_rate() op is supported, hook it up on SH7722
for the FRQCR (CPU, PCLK, etc.) clocks.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 13:30:07 +09:00
Paul Mundt
f6991b0456 sh: Implement clk_round_rate() in the clock framework.
This is an optional component of the clock framework. However,
as we're going to be using this in the cpufreq drivers, add
support for it to the framework.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 13:29:09 +09:00
Magnus Damm
39c7aa9ea9 sh: intc - add support for 7780
This patch converts the cpu specific 7780 setup code to use the
new intc controller. Many new vectors are added and also support for
external interrupt sense configuration. So with this patch it is now
possible to configure external interrupt pins as edge or level
triggered using set_irq_type().

No external interrupts are registered by default.
Use plat_irq_setup_pins() to select between IRQ or IRL mode.

This patch also fixes the Alarm IRQ for the RTC.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:21 +09:00
Magnus Damm
680c45981a sh: intc - improve group support
This patch improves intc group support, ie it makes it possible to
group interrupts together and mask / unmask the entire group. This
also works with priorities, so setting a priority for an entire group
is also possible. This patch is needed to properly support certain
processors such as the 7780.

Fixes for NULL pointers in DECLARE_INTC_DESC() are also included.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:21 +09:00
Magnus Damm
90015c8938 sh: IPR/INTC2 IRQ setup consolidation.
This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:20 +09:00
Magnus Damm
1b06428ee5 sh: intc - add support for 7722 processor
This patch converts the cpu specific 7722 setup code to use the
new intc controller. Many new vectors are added and also support
for external interrupt sense configuration. So with this patch
it is now possible to configure external interrupt pins as edge
or level triggered using set_irq_type().

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:20 +09:00
Magnus Damm
02ab3f7079 sh: intc - shared IPR and INTC2 controller
This is the second version of the shared interrupt controller patch
for the sh architecture, fixing up handling of intc_reg_fns[].

The three main advantages with this controller over the existing
ones are:

	- Both priority (ipr) and bitmap (intc2) registers are
	  supported
	- External pin sense configuration is supported, ie edge
	  vs level triggered
	- CPU/Board specific code maps 1:1 with datasheet for
	  easy verification

This controller can easily coexist with the current IPR and INTC2
controllers, but the idea is that CPUs/Boards should be moved over
to this controller over time so we have a single code base to
maintain.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:20 +09:00
Magnus Damm
53aba19f82 sh: Fix irq assignment for uarts on sh7722
This patch contains two serial port related fixes for sh7722:
- Make sure the irqs for the first serial port is correct
- Add the second and third serial port to the platform data

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:20 +09:00
Paul Mundt
20c2df83d2 mm: Remove slab destructors from kmem_cache_create().
Slab destructors were no longer supported after Christoph's
c59def9f22 change. They've been
BUGs for both slab and slub, and slob never supported them
either.

This rips out support for the dtor pointer from kmem_cache_create()
completely and fixes up every single callsite in the kernel (there were
about 224, not including the slab allocator definitions themselves,
or the documentation references).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 10:11:58 +09:00
Kristoffer Ericson
e509ac4bbc sh: sh-rtc support for SH7709.
Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-16 09:51:39 +09:00
Paul Mundt
2b1bd1ac5d sh: Preliminary support for the SH-X3 CPU.
This adds basic support for UP SH-X3.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-20 18:27:10 +09:00
Paul Mundt
027e56e685 sh: Hook up hard_smp_processor_id() for INTC2 block.
We need to know the CPU ID in order to calculate the mask and ack
registers effectively. Stub this in for UP.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-20 18:23:49 +09:00
Magnus Damm
68abdbbb03 sh: rework ipr code
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.

One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-15 18:56:19 +09:00
Magnus Damm
d619500aed sh: rework intc2 code
The shared intc2 code currently contains cpu-specific #ifdefs.
This is a tad unclean and it prevents us from using the shared code
to drive board-specific irqs on the se7780 board.

This patch reworks the intc2 code by moving the base addresses of
the intc2 registers into struct intc2_desc. This new structure also
contains the name of the controller in struct irq_chip. The idea
behind putting struct irq_chip in there is that we can use offsetof()
to locate the base addresses in the irq_chip callbacks.

One logic change has been made - the original shared intc2 code
enabled the interrupts by default but with this patch they are all
disabled by default.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-15 10:41:54 +09:00
Paul Mundt
9f9a5de466 sh: Fixup misaligned data for sh2 lockdep.
lockdep/irqflags tracing on SH-2 ends up with a misaligned
branch, fix it.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-11 15:33:44 +09:00
Paul Mundt
357d59469c sh: Tidy up dependencies for SH-2 build.
SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.

This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-11 15:32:07 +09:00
Paul Mundt
b9601c5e59 sh: Kill off dead SH7604 support.
This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-08 11:55:28 +09:00
Paul Mundt
5bbeafca8d sh: Fix the SH7722 flatmem build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-08 02:43:50 +00:00
Paul Mundt
520588f47f sh: URAM node support for SH7722.
This adds the URAM block on SH7722 as a separate node.
Sparsemem is required for this, or it can simply be disabled
by explicitly selecting a flatmem model.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-08 02:43:49 +00:00
Paul Mundt
05627486ab sh: Fix SH-4 CPU selects.
Now that select no longer works for selecting the "closest" CPU,
we have to explicitly reference the precise sub-type in the few
places where it actually matters (presently only setup code and
some legacy sh-sci cruft).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-08 02:43:40 +00:00
Paul Mundt
907c9d7004 sh: Fix SH4-202 clock fwk set_rate() mismatch.
With the SH7722 changes, ->set_rate() also takes an algo_id,
SH4-202 was overlooked when this change went in.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-04 10:51:59 +09:00
Paul Mundt
c596b1a380 sh: Fix in_nmi symbol build error.
If CONFIG_KGDB_NMI is disabled, we're left with a stray in_nmi
reference that can't be resolved. Move the symbol under the ifdef,
too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-04 10:39:50 +09:00
Evgeniy Polyakov
66c5227ecd sh: trivial build cleanups.
Several errors were spotted during building for custom config (SMP
included). Although SMP still does not compile (no ipi and
__smp_call_function) and does not work, this looks a bit cleaner.
Some other errors obtained via gcc-4.1.0 build.

Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-31 13:46:21 +09:00
Takashi YOSHII
370ac91aab sh: Fix pcrel too far for in_nmi label.
Add lost in_nmi definition to solve pcrel too far.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-31 13:42:21 +09:00
dmitry pervushin
dfbbbe9295 sh: Fix clock multiplier on SH7722.
This fixes up the master clock multiplier and initial rate
propagation for the SH7722 clocks.

Signed-off-by: dmitry pervushin <dimka@nomadgs.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-21 14:34:45 +09:00
Paul Mundt
27641dee99 sh: Fix up various compile warnings for SE boards.
- setup-sh7750.c only defines the sh7751_ipr_map when building
  with SH7751 support.

- 7722 Solution Engine was missing a mach-type entry, causing
  the macro in cf-enabler to be undefined.

- arch/sh/mm/init.c needs linux/pagemap.h.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-21 14:32:47 +09:00
Simon Arlott
e868d61272 spelling fixes: arch/sh/
Spelling fixes in arch/sh/.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-21 14:31:39 +09:00
Linus Torvalds
d84c4124c4 Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Fix stacktrace simplification fallout.
  sh: SH7760 DMABRG support.
  sh: clockevent/clocksource/hrtimers/nohz TMU support.
  sh: Truncate MAX_ACTIVE_REGIONS for the common case.
  rtc: rtc-sh: Fix rtc_dev pointer for rtc_update_irq().
  sh: Convert to common die chain.
  sh: Wire up utimensat syscall.
  sh: landisk mv_nr_irqs definition.
  sh: Fixup ndelay() xloops calculation for alternate HZ.
  sh: Add 32-bit opcode feature CPU flag.
  sh: Fix PC adjustments for varying opcode length.
  sh: Support for SH-2A 32-bit opcodes.
  sh: Kill off redundant __div64_32 symbol export.
  sh: Share exception vector table for SH-3/4.
  sh: Always define TRAPA_BUG_OPCODE.
  sh: __GFP_REPEAT for pte allocations, too.
  rtc: rtc-sh: Fix up dev_dbg() warnings.
  sh: generic quicklist support.
2007-05-09 13:08:20 -07:00
Uwe Kleine-König
5886269962 fix file specification in comments
Many files include the filename at the beginning, serveral used a wrong one.

Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2007-05-09 08:58:16 +02:00
Paul Mundt
074f98df05 sh: Add 32-bit opcode feature CPU flag.
Add a CPU flag for the CPUs that support 32-bit opcodes, which
gets passed down to userspace.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-09 01:35:01 +00:00
Paul Mundt
53f983a90d sh: Fix PC adjustments for varying opcode length.
There are a few different cases for figuring out how to
size the instruction. We read in the instruction located
at regs->pc - 4 when rewinding the opcode to figure out if
there's a 32-bit opcode before the faulting instruction, with
a default of a - 2 adjustment on a mismatch. In practice this
works for the cases where pc - 4 is just another 16-bit opcode,
or we happen to have a 32-bit and a 16-bit immediately
preceeding the pc value.

In the cases where we aren't rewinding, this is much less ugly..

We also don't bother fixing up the places where we're explicitly
dealing with 16-bit instructions, since this might lead to
confusion regarding the encoding size possibilities on other
CPU variants.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-09 01:35:01 +00:00
Paul Mundt
bd0799977c sh: Support for SH-2A 32-bit opcodes.
SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-09 01:35:01 +00:00
Paul Mundt
00bf0610e4 sh: Share exception vector table for SH-3/4.
The only difference between these at the moment are the FPU
exceptions, and these are hidden away under CONFIG_SH_FPU
(which is only set for the SH-4 case anyways..).

This consolidates the two tables, and updates SH-4 to use
the updated copy.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-09 01:35:01 +00:00
Ryusuke Sakato
39374aadcd sh: R7785RP board updates.
Some fixups for the R7785RP board. Gets iVDR working.

Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:11:57 +00:00
Takashi YOSHII
70fe4d87bf sh: Wire up more IRQs for SH7709.
hp6xx requires some additional IRQs that aren't currently enabled in
the SH7709 setup code. Wire them up.

Signed-off-by: Takashi YOSHII <takashi.yoshii.ze@hitachi.com>
Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:11:57 +00:00
Paul Mundt
db62e5bd29 sh: Move clock reporting to its own proc entry.
Previously this was done in cpuinfo, but with the number of clocks
growing, it makes more sense to place this in a different proc entry.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:11:56 +00:00
Nobuhiro Iwamatsu
2a8ff4596c sh: Solution Engine SH7705 board and CPU updates.
This fixes up SH7705 CPU support and the SE7705 board
for some of the recent changes.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:11:56 +00:00
dmitry pervushin
1929cb340b sh: SH7722 clock framework support.
This adds support for the SH7722 (MobileR) to the clock framework.

Signed-off-by: dmitry pervushin <dimka@nomadgs.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:11:56 +00:00
Nobuhiro Iwamatsu
9465a54fa4 sh: MS7712SE01 board support.
Support the SH7712 (SH3-DSP) Solution Engine reference board.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:10:54 +00:00
Paul Mundt
32351a28a7 sh: Add SH7785 Highlander board support (R7785RP).
This adds preliminary support for the SH7785-based Highlander board.
Some of the Highlander support code is reordered so that most of it
can be reused directly.

This also plugs in missing SH7785 checks in the places that need it,
as this is the first board to support the CPU.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:10:53 +00:00
Paul Mundt
45ed285b54 sh: speculative execution support for SH7780.
SH7780 has a speculative execution mode where it can speculatively
perform an instruction fetch for subroutine returns, this allows it
to be enabled. There are some various pitfalls associated with this
mode, so it's left as depending on CONFIG_EXPERIMENTAL and not
enabled by default.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07 02:10:51 +00:00
Paul Mundt
3afb209a43 sh: Fix bogus regs pointer in do_IRQ().
SH-3 and SH-4 were trampling the register, and SH-2 wasn't even
setting it in the first place. This ended up with some rather
broken behaviour in the sysrq show_regs().

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-03-14 13:03:35 +09:00
Paul Mundt
ffe1b4e9f4 sh: Fix SH-3 cache entry_mask and way_size calculation.
The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-03-12 16:15:22 +09:00
Tobias Klauser
c5a69d57eb Storage class should be before const qualifier
The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2007-02-17 20:11:19 +01:00
Paul Mundt
9c57548f17 sh: rts7751r2d board updates.
This tidies up some of the rts7751r2d mess and gets it booting
again. Update the defconfig, too.

Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-15 18:20:52 +09:00
Paul Mundt
db2e1fa3f0 sh: Revert TLB miss fast-path changes that broke PTEA parts.
This ended up causing problems for older parts (particularly ones
using PTEA). Revert this for now, it can be added back in once it's
had some more testing.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-14 14:13:10 +09:00
Paul Mundt
11c1965687 sh: Fixup cpu_data references for the non-boot CPUs.
There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
aec5e0e1c1 sh: Use a per-cpu ASID cache.
Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Manuel Lauss
9f8a5e3a44 sh: SH-DMAC compile fixes
This patch does the following:
- remove the make_ipr_irq stuff from dma-sh.c and replace it
  with a simple channel<->irq mapping table.
- add DMTEx_IRQ constants for sh4 cpus
- fix sh7751 DMAE irq number

The SH7780 uses the same IRQs for DMA as other SH4 types, so
I put the constants on top of the dma.h file.

Other CPU types need to #define their own DMTEx_IRQ contants
in their appropriate header.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Manuel Lauss
6dcda6f1ec sh: add SH7760 IPR IRQ data
Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
26b7a78c55 sh: Lazy dcache writeback optimizations.
This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.

With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.

And finally, explicitly disable the lazy writeback on SMP (SH-4A).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Paul Mundt
7a847f8190 sh: More tidying for large base pages.
There were a few more things that needed fixing up, namely THREAD_SIZE
and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE
assumptions were being made.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Takashi YOSHII
f725b5ee1e sh: shmin updates.
This fixes up shmin (and SH7706/SH7708) IPR support for some of the
recent API changes.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Yoshinori Sato
5c67cd05e3 sh: sh7619 / sh7206 IPR initialize update
IPR initialize proceduere update.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
Yoshinori Sato
4aa362bbdd sh: Update SH-2 to use the debug trap jump table.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
Paul Mundt
f413d0d9fa sh: Use a jump call table for debug trap handlers.
This rips out most of the needlessly complicated sh_bios and kgdb
trap handling, and forces it all through a common fast dispatch path.
As more debug traps are inserted, it's important to keep them in sync
for all of the parts, not just SH-3/4.

As the SH-2 parts are unable to do traps in the >= 0x40 range, we
restrict the debug traps to the 0x30-0x3f range on all parts, and
also bump the kgdb breakpoint trap down in to this range (from 0xff
to 0x3c) so it's possible to use for nommu.

Optionally, this table can be padded out to catch spurious traps for
SH-3/4, but we don't do that yet..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
Yoshinori Sato
e9cfc147df sh: Fixup SH-2 BUG() trap handling.
This adds in support for the BUG() trap on SH-2.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12 09:11:45 +09:00
Paul Mundt
05c8690d95 sh: Hook up SH7722 scif ipr interrupts.
Add the SCIF IRQs to the IPR table for SH7722.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12 08:49:06 +09:00
Paul Mundt
41504c3972 sh: SH-MobileR SH7722 CPU support.
This adds CPU support for the SH7722.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12 08:42:09 +09:00
Paul Mundt
37bda1da45 sh: Convert remaining remap_area_pages() users to ioremap_page_range().
A couple of these were missed.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12 08:42:08 +09:00
Yoshinori Sato
780a156888 sh: IPR IRQ updates for SH7619/SH7206.
This updates the SH7619 and SH7206 code for the IPR IRQ changes.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12 08:42:07 +09:00
Jamie Lenehan
417d6b9edb sh: register rtc resources for sh775x.
Register the RTC resources for the sh775x subtype so that the new
generic RTC support in drivers/rtc/rtc-sh.c will work.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12 08:42:07 +09:00
Christoph Lameter
e18b890bb0 [PATCH] slab: remove kmem_cache_t
Replace all uses of kmem_cache_t with struct kmem_cache.

The patch was generated using the following script:

	#!/bin/sh
	#
	# Replace one string by another in all the kernel sources.
	#

	set -e

	for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do
		quilt add $file
		sed -e "1,\$s/$1/$2/g" $file >/tmp/$$
		mv /tmp/$$ $file
		quilt refresh
	done

The script was run like this

	sh replace kmem_cache_t "struct kmem_cache"

Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07 08:39:25 -08:00
Jamie Lenehan
ea0f8feaa0 sh: sh775x/titan fixes for irq header changes.
The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.

 - adds an ipr_idx to the ipr_data and uses a function in the subtype
   code to calculate the address of the IPR registers

 - adds a function to enable individual interrupt mode for externals
   in the subtype code and calls that from the titan board code
   instead of doing it directly.

 - I changed the shift in the ipr_data to be the actual # of bits to
   shift, instead of the numnber / 4 - made it easier to match with
   the manual.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 12:05:02 +09:00
Paul Mundt
afbfb52e47 sh: stacktrace/lockdep/irqflags tracing support.
Wire up all of the essentials for lockdep..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
1d118562c2 sh: Clock framework tidying.
This syncs up the SH clock framework with the linux/clk.h API,
for which there were only some minor changes required, namely
the clk_get() dev_id and subsequent callsites.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
9f650cf2b8 sh: Fix store queue bitmap end.
The end of the store queue bitmap is miscalculated when searching
for a free range in sq_remap(), missing the PAGE_SHIFT shift that's
done in sq_api_init(). This runs in to workloads where we can scan
beyond the end of the bitmap.

Spotted by Paul Jackson:

	http://marc.theaimsgroup.com/?l=linux-kernel&m=116493191224097&w

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
510c72ad2d sh: Fixup various PAGE_SIZE == 4096 assumptions.
There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.

The most significant change is the way we load THREAD_SIZE,
previously this was done via:

	mov	#(THREAD_SIZE >> 8), reg
	shll8	reg

to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Stuart Menefy
9b3a53ab76 sh: TLB miss fast-path optimizations.
Handle simple TLB miss faults which can be resolved completely
from the page table in assembler.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
b5a1bcbee4 sh: Set up correct siginfo structures for page faults.
Remove the previous saving of fault codes into the thread_struct
as they are never used, and appeared to be inherited from x86.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
f0bc814cfb sh: gcc4 support.
This fixes up the kernel for gcc4. The existing exception handlers
needed some wrapping for pt_regs access, acessing the registers
via a RELOC_HIDE() pointer.

The strcpy() issues popped up here too, so add -ffreestanding and
kill off the symbol export.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Paul Mundt
9a7ef6d59f sh: Drop CPU subtype IRQ headers.
This drops the various IRQ headers that were floating around
and primarily providing hardcoded IRQ definitions for the
various CPU subtypes. This quickly got to be an unmaintainable
mess, made even more evident by the subtle breakage introduced
by the SH-2 and SH-2A changes.

Now that subtypes are able to register IRQ maps directly, just
rip all of the headers out.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:37 +09:00
Paul Mundt
417528a2e3 sh: Configurable timer IRQ.
All of the various CPU subtypes currently hardcode TIMER_IRQ,
switch this to a config option in the few places we need this.

This allows further removal of hardcoded IRQ headers..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:37 +09:00
Paul Mundt
716067f289 sh: Fixup entry-common path breakage for SH-3.
The nommu patches broke the path for the common bits, get it building
for the SH-3/4 case again.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:37 +09:00
Yoshinori Sato
de39840646 sh: Exception vector rework and SH-2/SH-2A support.
This splits out common bits from the existing exception handler for
use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A
exceptions.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:36 +09:00
Yoshinori Sato
9d4436a6fb sh: Add support for SH7206 and SH7619 CPU subtypes.
This implements initial support for the SH7206 (SH-2A) and SH7619
(SH-2) MMU-less CPUs.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:36 +09:00
Jamie Lenehan
bd71ab88de sh: Fix IPR-IRQ's for IRQ-chip change breakage.
The conversion from IPR-IRQ to IRQ-chip resulted in the
ipr data being allocated in a local variable in
make_ipr_irq - breaking anything using IPR interrupts.

This changes all of the callers of make_ipr_irq to
allocate a static structure containing the IPR data which
is then passed to make_ipr_irq. This removes the need for
make_ipr_irq to allocate any additional space for the IPR
information.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-31 12:53:28 +09:00
Paul Mundt
66a740572d sh: Convert INTC2 to IRQ table registration.
Currently the INTC2 code contains a fixed IRQ table that it
iterates through to set the handler type, we move this in to
the CPU subtype setup code instead and allow for submitting
the table that way.

This drops the ST40 tables, as nothing has been happening
with those processors, while converting the only existing
users to use the new table directly (SH7760 and SH7780).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-20 15:30:55 +09:00
Paul Mundt
709bc44c31 sh: Updates for irq-flow-type naming changes.
handle_irq_name() and set_irq_chip_and_handler() disappeared,
update for desc->name and set_irq_chip_and_handler_name() use.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-19 17:32:56 +09:00
Paul Mundt
1f666587db sh: Fix exception_handling_table alignment.
With the recent change ripping out interrupt_table, explicit
padding of the table was missing, causing bad things to happen
when manually inserting handlers in to the table. This problem
particularly showed up in relation to do_fpu_state_restore()
which was inserted quite deeply in to the table and ended up
scribbling over a slab object.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-19 16:30:32 +09:00
Paul Mundt
baf4326e49 sh: interrupt exception handling rework
Kill off interrupt_table for all of the CPU subtypes, we now
default in to stepping in to do_IRQ() for _all_ IRQ exceptions
and counting the spurious ones, rather than simply flipping on
the ones we cared about. This and enabling the IRQ by default
automatically has already uncovered a couple of bugs and IRQs
that weren't being caught, as well as some that are being
generated far too often (SCI Tx Data Empty, for example).

The general rationale is to use a marker for interrupt exceptions,
test for it in the handle_exception() path, and skip out to
do_IRQ() if it's found. Everything else follows the same behaviour
of finding the cached EXPEVT value in r2/r2_bank, we just rip out
the INTEVT read from entry.S entirely (except for in the kGDB NMI
case, which is another matter).

Note that while this changes the do_IRQ() semantics regarding r4
handling, they were fundamentally broken anyways (relying entirely
on r2_bank for the cached code). With this, we do the INTEVT read
from do_IRQ() itself (in the CONFIG_CPU_HAS_INTEVT case), or fall
back on r4 for the muxed IRQ number, which should also be closer
to what SH-2 and SH-2A want anyways.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-12 12:03:04 +09:00
Paul Mundt
0f13804ae9 sh: Convert IPR-IRQ to IRQ chip.
One more initial conversion..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-06 17:55:25 +09:00
Paul Mundt
525ccc452c sh: Convert INTC2 IRQ handler to irq_chip.
More struct irq_chip conversions, this time the INTC2 handlers.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-06 17:35:48 +09:00
Uwe Zeisberger
f30c226954 fix file specification in comments
Many files include the filename at the beginning, serveral used a wrong one.

Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-10-03 23:01:26 +02:00
Paul Mundt
f3c2575818 sh: Calculate shm alignment at runtime.
Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:36:17 +09:00
Paul Mundt
d15f456043 sh: More intelligent entry_mask/way_size calculation.
Figure out the cache desc entry_mask at runtime, and remove
hard-coded assumption about the cacheline size.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:28:34 +09:00
Paul Mundt
72c35543f8 sh: Support for L2 cache on newer SH-4A CPUs.
This implements preliminary support for the L2 caches found
on newer SH-4A CPUs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:27:43 +09:00
Paul Mundt
315bb96824 sh: CPU flags in AT_HWCAP in ELF auxvt.
Encode processor flags in AT_HWCAP in the ELF auxiliary vector.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:22:53 +09:00
Paul Mundt
a6a3113989 sh: Add support for 4K stacks.
This enables support for 4K stacks on SH.

Currently this depends on DEBUG_KERNEL, but likely all boards
will switch to this as the default in the future.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:22:14 +09:00
Paul Mundt
8599cf0592 sh: Cleanup IRQ disabling for hardirq handlers.
The generic hardirq layer already takes care of a lot of the
appropriate locking and disabling for us, no need to duplicate
it in the handlers..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:03:34 +09:00
Paul Mundt
ba463937ef sh: maskreg IRQ support.
Formerly implemented by ADX, we can use this generically,
so move it over.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:01:16 +09:00
Paul Mundt
91550f715b sh: Kill off the rest of the legacy rtc mess.
With the new RTC class driver, we can get rid of most of the
old left over cruft.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 17:45:01 +09:00
Paul Mundt
e5723e0eeb sh: Add support for SH7706/SH7710/SH7343 CPUs.
This adds support for the aforementioned CPU subtypes, and cleans
up some build issues encountered as a result.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 17:38:11 +09:00
Paul Mundt
7dec62e96b sh: Add setup code for various CPU subtypes.
This adds some simple setup code for most of the CPU subtypes,
primarily simple platform device registration.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 17:30:35 +09:00
Paul Mundt
237b98f61d sh: sem2mutex conversion for clock framework.
Simple sem2mutex conversion.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 17:28:20 +09:00