Commit Graph

890 Commits

Author SHA1 Message Date
Dhaval Patel
f97e75d7ab disp: msm: sde: flush crtc event thread before idle notification
Flush sde crtc event thread before idle notification
to make sure that pending frame count is zero. This
allows sde encoder module to trigger power collapse
during pm_suspend scenario.

Bug: 146848315
Change-Id: Ic65a76273417c567c330e970c97183e5c0f4ad17
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:25:20 -07:00
Dhaval Patel
141afabada dips: msm: configure sde and vbif dbg name
Configure sde and vbif debug bus name when
it is registered instead of while registering
the debugfs node.

Change-Id: I41afeede0b3d725a3b6d164e1c0f22e05f7320ec
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:25:04 -07:00
Dhaval Patel
e7123aec1c disp: msm: sde: update autorefresh disable seq-2
Update autorefresh disable sequence-2 by avoiding
tearcheck enable configuration. Updated sequence
will trigger the frame by resetting the write
line count with tearcheck start position.

Change-Id: I984251c0cb23475f20cd5ea62122a167324d6670
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:54 -07:00
Dhaval Patel
1a9e3bae54 disp: msm: sde: update autorefresh disable sequence
Autorefresh might be still in enabled state after
write_ptr reached to display height. This patch
checks the autorefresh status bit and keeps polling
the bit till autorefresh sequence is in enabled
state. It times out after 1 second if autorefresh
is still in enabled state.

Change-Id: I5d4f4cb35e5cc8c680c1878f52cee385f709d764
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:42 -07:00
Samantha Tran
bf06be4737 disp: msm: queue vblank work on event thread
This change queues vblank work to event thread rather than
the display thread. This allows vblank events to be processed
without potentially being delayed by crtc commit being processed.

Change-Id: I9cbf9b3de646716e4698af9f338a7140346b65fd
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 19:24:15 -07:00
Samantha Tran
0064a0227b drm/msm/sde: fix race condition in vblank control interrupts
In Dual display concurrencies there are certain cases where
irq_idx and vblank_refcount state mismatch can occur.
To avoid it, during setup of irq_hw_idx, reset the vblank_refcount
and unregister read ptr irq if not yet done by then along with
maintaining global mutex lock for vblank_refcount.
Also, if register IRQ fails, correct vblank_refcount so
that IRQ registration can be tried again.

Change-Id: I06bcbf71c6a43bd161ff61093d9f6063a292d6bc
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:54:43 -07:00
Samantha Tran
83ff89732a disp: msm: sde: remove check comparing encoder's crtc and crtc
This change removes the check comparing encoder's crtc to the
crtc passed in. This check was required up until commit 70486d209c
("disp: msm: sde: remove vblank cache logic"). Now that iteration
is only happening over encoders in the encoder mask, there is no
need to check for a matching crtc to ensure it is valid.

Change-Id: I4ee08061e6c8679fe03f42cf2f889704c99526e5
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:54:10 -07:00
Nilaan Gunabalachandran
eddae0d758 disp: msm: increase delay times while waiting to turn off rscc clocks
RSC is timing out while checking for power control register,
increasing wait times only after a poms, removes this issue.

Change-Id: I4a324eb3c87e7dfb84d9a8b0a11597327d206a74
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 16:53:47 -07:00
Lakshmi Narayana Kalavala
1f331b536f drm: msm: sde: handle event disable failure
If unregister event fails to succeed due to invalid params
or due to inappropriate hardware configuration, The callback function
is not deleted from the irq table. This leads to list corruption
issues in the subsequent calls to event enable and disable.

Change-Id: I549bd15b07b9a3b04c0f0a239bd85748acf7d473
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
2020-03-29 16:53:35 -07:00
Yashwanth
51e45dfa59 disp: rotator: update iommu domain info during rotator probe
In 4.19 kernel, smmu driver will attach context bank soon
after device is probed. This change fixes display driver to
treat smmu context bank as pre attached.

Change-Id: Ib95abeb3c853903efb9bed3e04552278576a572a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-03-29 16:53:26 -07:00
Jayaprakash
8fa5ad6a2b disp: msm: sde: fix input_handler operations for various usecases
Input event handler can be unregistered without being
registered in the case where DMS or DYN_CLK flags
are enabled on first commit, add changes to handle
this sequence.

Change-Id: Idf4f9f310b5d56df396bfa5c6477e94d4fae7a9f
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 16:53:16 -07:00
Nilaan Gunabalachandran
5bd891e4e2 disp: msm: sde: fix failure in perf mode clk update through debugfs
Setting perf tuning mode through debugfs during suspend can
result in underflow. Ensure that we are able to set rates,
or reset values and return to remain in normal mode.

Change-Id: Ib88de888690086d982b023b017083fee4e4d2091
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-03-29 16:53:06 -07:00
Gopikrishnaiah Anandan
c4f345dd75 msm: sde: notify driver client of resource allocation failure
Events can be registered by the driver clients using the custom event
registration ioctl.If display is not powered on when custom ioctl is
called, registration fails.Currently driver notifies user-space client
invalid error,instead it should notify that resources are not allocated
for display so that user-space client can retry.

Change-Id: Ia6e35c8c32bf00dbe2ef51b13092edf7bf5f41f7
Signed-off-by: Xu Yang <yangxu@codeaurora.org>
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-29 16:52:56 -07:00
Samantha Tran
78ff60d33a disp: msm: sde: add encoder null check in prepare commit
Add a null check for encoder before accessing ops.

Change-Id: I7b80f4aded89d6c6fe68a0d016f64e14f04f2e58
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:52:47 -07:00
Nilaan Gunabalachandran
7ebf621320 disp: msm: sde: check new connector state for secure context
During wb use case, if any of the input buffers are secure,
the output buffer must also be in secure. In order to
successfully check if output buffer is secure context,
kernel needs to access new connector state.

Change-Id: Ia0124418eac35cf6d3301603e39ed45b971e2665
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-03-29 16:52:36 -07:00
Nilaan Gunabalachandran
868fb9cb24 disp: msm: sde: fix frame event signal for cwb
Submit a cwb frame event signal to notify the crtc that cwb
is completed. Currently cwb also uses the same frame done
event as primary. When a single cwb commit is completed, because
cwb is on a slower path there is a race condition in which the
subsequent frame done event for primary clears the refcount.
This fix isolates the events and removes this situation.

Change-Id: Ic3e18302eb8a497cbd7a00f271de2ab320576c83
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-03-29 16:52:27 -07:00
Renchao Liu
b3cb4343b1 disp: msm: Fix byte alignment problem on 32bits OS
There is potential byte alignment problem on 32bits OS which will
cause incorrect histogram blob id getting from the user space.
This change fixes byte alignment problem on 32bits OS by keeping
the struct members in one complete struct as the user space using.

In previous code start address of 'info' would align to multiple of 8,
so there would be 4 bytes padding between member 'event' and 'info'
on 32 bits OS. It is affected by member 'base'. But user space just
uses struct drm_msm_event_resp only, not affected by member 'base'.
Driver code intends to send drm_msm_event_resp, but actually send
unpacked members.

Change-Id: I5410f5b1626387707a57cbcef9c651aa11914d9d
Signed-off-by: Renchao Liu <rencliu@codeaurora.org>
2020-03-29 16:52:16 -07:00
Lakshmi Narayana Kalavala
c3010cfe77 disp: msm: sde: initialize list head of irq node
List head should be initialized after the irq node is allocated.
Change initializes the list head of the node.

Change-Id: I495751fcf2422bba3f39a0719e2d76738b691dd9
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
2020-03-29 16:52:00 -07:00
Jayaprakash
508dad9261 disp: msm: avoid double unmap during secure vid to secure UI transition
During secure video to secure ui transition, since
secure ui requires s2 direct translation, display driver
will detach the iommu device after unmap of the buffers
attached to the CB.

In this regard, upstream framework which can independently
request for buffer free to unmap on the buffer creates an
illegal state where in dma ops are attached and iommu device
is dettached.

Cache the dma ops before detaching the CB and set it to
NULL during iommu device detach, to avoid multiple unmap
calls on the buffer.

Change-Id: I11cd33f5f52b8c9c4f3a627c520bff57e340c8a4
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 16:51:48 -07:00
Samantha Tran
793d2a33d7 disp: msm: sde: destroy framebuffers after plane cleanup
Add framebuffer destroy immediately following plane cleanup
during secure display transition. Set state's fb to NULL
after destroying to avoid attempting to destroy fb again
during plane state destroy. Previously, framebuffer destroy
is happening after the context is detached while plane states
are being destroyed.

Change-Id: I273ce5b85c30962ea7e0a738a366487c9c85d4df
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:51:39 -07:00
Yashwanth
d8cabe36c1 disp: msm: sde: add uidle property to the crtc
This change adds support to check whether uidle
is supported for given target.

Change-Id: Icd7ef36eeefcd8d1fc3c960dc7c7560469945408
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-03-29 16:51:27 -07:00
Krishna Manikandan
1b0fa415a0 disp: msm: modify stage for dim layer during atomic set
Stage property is modified for dimlayer during atomic
set property phase. This avoids any commit failure occurred due
to dimlayer checks during atomic check phase.

Change-Id: I4ff3d83a5aa9d6446fd4955f6c29854acf93bc68
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:51:15 -07:00
Krishna Manikandan
83f31f5ebb disp: msm: add support to expose base layer staging property
Add support to expose base layer staging property to HAL.
In those targets where base layer staging is enabled in mixer,
layer with zorder 0 will be staged as base layer.

Change-Id: Id825357c61ac6913bdcb8a184fc501236519d5dd
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:51:05 -07:00
Krishna Manikandan
e99063c7a3 disp: msm: stage layer with zorder 0 as base layer
Add support to stage layer with zorder 0 as base
layer and stage borderfill only during null commit.

Change-Id: I54356c1b7834227cc3da00c211e71ac5816ce51a
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:50:44 -07:00
Ray Zhang
782d4feb24 disp: msm: sde: Initialize wr_ptr_wait_success after kickoff
wr_ptr_wait_success is true only if wr_ptr interrupt arrives, so
initialize it after display kickoff.

Change-Id: I5790d9dac25352898ece160f6b258b50ca2edefa
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
2020-03-29 16:50:29 -07:00
Nilaan Gunabalachandran
53a5b3670f disp: msm: sde: update last power event handled correctly
Update triggered power event to last event correctly,
regardless of whether a callback is called.
Add event log to see debugfs clock rate change.

Change-Id: Ifa9c1ffb450f50a3928eb44362723b6d495b2354
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-03-29 16:50:17 -07:00
Veera Sundaram Sankaran
a9574eb8c2 disp: msm: perform delayed buf attach during secure transitions
While transitioning from secure usecases, the secure
context bank is attached back only during the commit
phase. This leads to invalid secure context-bank device
issue, when the prime_to_fd call is made for the next
frame. Avoid it, by attaching to default drm device
during the prime_to_fd call and reattach it to the
secure context-bank device at the delayed import time.

Change-Id: I43e6da7f117f20746943a48b5f2657e9ae2947ea
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-29 16:50:07 -07:00
Jayaprakash
e7f3931297 disp: msm: sde: Avoid releasing the committed RM reservations
RM allocated reservations for the ongoing commit are cleared when
there is a delay in ongoing commit scheduling and back to back
prepare comes. This clearing occurs in the subsequent checkonly
commit with modechange property set.

Timeline of the issue:
   --> C1 commit check_only + modeset, RM allocated resources
   --> C2 commit check_only scheduled before C1 commit with
       check_only + modeset, overridden C1 reservations with
       its own into rsvp_nxt
   --> C1 commit scheduled and RM committed reservations
       allocated by C2.

Change-Id: I46cc924fd6515590e32c8e97a82847d2bde97270
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 16:49:52 -07:00
Krishna Manikandan
ec6688849b disp: msm: sde: avoid CWB connector in determining active crtc
CWB connector is tied to primary crtc along with primary connector.
Avoid using CWB connector power state in determining active crtc,
as it is already done via primary connector.

Change-Id: I35ec95349790990c49b9a63afd6e0f55d23b4887
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:49:40 -07:00
Krishna Manikandan
4442431141 disp: msm: sde: cleanup writeback phys_enc structures during wb disable
Hardware structures for writeback ctl and cdm are set
to null during wb disable, to prevent crtc mode change
on primary during subsequent wfd and cwb sessions.

Change-Id: I7536203761c615c37c8633d1621951475895400a
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:49:12 -07:00
qctecmdr
b994f0f191 Merge "disp: rotator: remove setting secure domain attribute at probe" 2020-03-29 14:03:20 -07:00
qctecmdr
845000ba36 Merge "disp: msm: sde: setting async cmd wait flag only for DSI" 2020-03-29 10:01:25 -07:00
Yashwanth
f4dc9fb0dc disp: rotator: remove setting secure domain attribute at probe
This change removes setting attribute call at probe since it gets
pre-initialized from smmu.

Change-Id: I8c434e9d88ecf36e0cf033798c52613e14e2faba
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-03-29 09:55:20 -07:00
Veera Sundaram Sankaran
20a7886cc5 disp: msm: sde: avoid vblank notification for cwb
The vsync callback for concurrent writeback is
not necessary. This would conflict with vblank
notification of primary as both belongs to the
same crtc.

Change-Id: Idb67915de086f94feb231d61b6f7e4e068a1ac35
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-29 09:55:00 -07:00
Nilaan Gunabalachandran
2e0702c7e6 disp: msm: sde: check input & output buffer for secure context
During validate, kernel should check if input buffer frame
buffer for wb conn is in secure context. If so, the output
buffer must also be secure context, or fail validate before commit.

Change-Id: I38e50f8b2ac71c8532d9d44df08850bf33180c41
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-03-29 09:54:43 -07:00
Nilaan Gunabalachandran
42b9fb5937 disp: msm: sde: check power event before set clk rate
Clock rate can be set from debugfs, and this can attempt to
set clock rate even when display power is not enabled.
Set clock rate should check the last power event first.

Change-Id: Ibf01753a288e5a3003928664c99aa6dbf26350d6
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-03-29 09:54:23 -07:00
Jayaprakash
8274efd919 disp: msm: sde: add plane check in continuous splash case
In dual display continuous splash case, there are certain
scenarios where pipe being used in secondary display at boot up
is allocated by primary crtc. Add check to return failure
in such cases.

Change-Id: I9047b6e7f91e59a9daff5089abb41017c068b449
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 09:51:49 -07:00
Jayaprakash
4536e7b2a6 disp: msm: sde: add null pointer checks
Add null check for pingpong block used during
the commit phase.

Change-Id: I3ebbcfe9c42ee6d1201a141f553bbb0a0ae97ad6
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 09:51:30 -07:00
Jayaprakash
2f050dc9fe disp: msm: sde: modify setting of split_display flag
For CTL_ACTIVE targets, slave ctl need not to be reserved
as both the interfaces can be driven with single ctl.
Add a necessary check before enabling the feature.

Change-Id: Id68d7dd4fc1cf9534466fd5bfa50c3f551d06ce4
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 09:51:04 -07:00
Raviteja Tamatam
c763a14ba0 disp: msm: sde: signal retire fence in wr_ptr timeout
There can be few cases of ESD where CTL_START is cleared but
wr_ptr interrupt does not come. Signaling retire fence in these
cases to avoid freeze and dangling pending_retire_fence_cnt.

Change-Id: I167f69dce5cbe43b4771e5056d8a73bd7587e76e
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-03-29 09:50:55 -07:00
Kalyan Thota
0380f4bd90 msm:disp:rotator: setup irq during first rotator commit
Move the rotator irq registration from probe to first commit, as the
irq is available only after bind on the mdss master device.
The late bind is causing rotator driver to get defered multiple times
and on some occasions rotator probe is not called as its stuck in
the deferred probe list.

Change-Id: Ieff99b31c42d2c9cbc0a4097de7afc9f1b29df77
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
2020-03-29 09:50:47 -07:00
Veera Sundaram Sankaran
bceea4e1fe disp: msm: sde: reset ctl on autorefresh disable failure
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.

Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-28 23:07:32 -07:00
Yashwanth
363aadd666 disp: msm: sde: update wb properties to optional
This change updates mandatory wb property to
optional as few low tier targets do not have wb
hardware block.

Change-Id: I39e6bf80a527dff95905e0a204401185e9e7bc03
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-03-28 23:06:59 -07:00
Raviteja Tamatam
69c24f5a32 disp: msm: sde: update BW_INDICATION programing sequence
BW_INDICATION indication must be programed before BWI_THRESHOLD.
Otherwise, it will revert to legacy behaviour and rsc wakeup is
delayed by one vsync causing janks. In current code BW_INDICATION
is done after LM/SSPP programming and plane fence wait. Moved the
perf_crtc_update before this and just after ctl prepare configuration
to avoid chances of BW_INDICATION crossing BWI_THRESHOLD time.

Change-Id: Ie976720910c34aaf140f1ce7daef38ba20bc10f5
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-03-28 23:06:51 -07:00
Jayaprakash
975f864784 disp: rotator: update ot limits for kona family
Update rotator ot limits as per QOS recommendation.

Change-Id: I852155902149dc2518b78144658b96f9ee8b4b4d
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-28 23:06:21 -07:00
Ravikanth Tuniki
08a2bea751 disp: msm: use platform independent API for cpu number
Use platform independent API for cpu number which
compiles on both 32 and 64 bit machine.

Change-Id: I539de278776623a84067460569a2b99676a2ba4e
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2020-03-28 23:06:14 -07:00
Kalyan Thota
2eb06ab57f disp: msm: sde: fix clk_array index during prepare fail
In clk enable failure case, pickup only enabled clks
and disable them during unwind process.

Change-Id: I004cf71a8ee567d56a1cd7f8f3d2f39ffb58fd61
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
2020-03-28 23:06:05 -07:00
qctecmdr
4195464d87 Merge "disp: msm: sde: fix DSC initial line calculation" 2020-03-26 20:32:06 -07:00
qctecmdr
52d46ebea5 Merge "disp: msm: sde: rename the cont splash region" 2020-03-26 06:42:21 -07:00
qctecmdr
9575e1f87e Merge "disp: msm: sde: modify fal10 thresholds for lahaina" 2020-03-25 07:02:57 -07:00