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63 lines
2.5 KiB
C
63 lines
2.5 KiB
C
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///////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2018 F4EXB //
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// written by Edouard Griffiths //
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// //
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// See: http://liquidsdr.org/blog/pll-howto/ //
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// Fixed filter registers saturation //
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// Added order for PSK locking. This brilliant idea actually comes from this //
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// post: https://www.dsprelated.com/showthread/comp.dsp/36356-1.php //
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// //
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// This program is free software; you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation as version 3 of the License, or //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License V3 for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with this program. If not, see <http://www.gnu.org/licenses/>. //
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///////////////////////////////////////////////////////////////////////////////////
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#ifndef SDRBASE_DSP_FREQLOCKCOMPLEX_H_
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#define SDRBASE_DSP_FREQLOCKCOMPLEX_H_
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#include "dsp/dsptypes.h"
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#include "iirfilter.h"
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#include "export.h"
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/** General purpose Phase-locked loop using complex analytic signal input. */
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class SDRBASE_API FreqLockComplex
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{
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public:
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FreqLockComplex();
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~FreqLockComplex();
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void reset();
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void computeCoefficients(float wn);
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/** Feed PLL with a new signa sample */
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void feed(float re, float im);
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private:
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float m_a0;
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float m_a1;
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float m_a2;
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float m_b0;
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float m_b1;
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float m_b2;
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float m_v0;
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float m_v1;
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float m_v2;
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std::complex<float> m_y;
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std::complex<float> m_prod;
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float m_yRe;
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float m_yIm;
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float m_freq;
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float m_phi;
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IIRFilter<float, 2> *m_iir;
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};
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#endif /* SDRBASE_DSP_FREQLOCKCOMPLEX_H_ */
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