f4exb
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3410d289d1
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Use even/odd FIR filter based half band decimators for the device decimators
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2016-11-05 21:52:13 +01:00 |
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f4exb
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f2a50c0c0f
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Use even/odd FIR filter half band interpolator only if SIMD is available
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2016-11-04 22:47:09 +01:00 |
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f4exb
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9f74c82715
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IntHalfBand FIR filter SSE optimizations
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2016-11-04 01:12:39 +01:00 |
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f4exb
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2f02d9dd69
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IntHalgBandFilterDB: changed some attributes name
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2016-11-03 00:30:55 +01:00 |
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f4exb
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942f897978
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Use the double buffer FIR filter with the front end decimators
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2016-11-02 09:15:32 +01:00 |
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f4exb
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86c148ab10
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DownChannelizer: use more efficient double buffer half band decvimator
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2016-11-01 17:57:46 +01:00 |
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f4exb
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5d5593bda7
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Tx ph.2: put the double buffered FIR interpolator and decimator in its own class
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2016-11-01 15:02:50 +01:00 |
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f4exb
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ded1d3c298
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Place the halfband filter traits in their own class
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2016-11-01 11:55:16 +01:00 |
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f4exb
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bd4d224166
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Tx ph.2: IntHalfBandFilter: use double buffer technique for interpolation. Use it with the UpChannelizer and increase order to 96 for better spur rejection. Moreover it is still more CPU efficient
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2016-11-01 05:54:25 +01:00 |
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f4exb
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3173bc0b07
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Tx ph.2: Interpolator polyphase filter: add possibility to specify the number of taps per phase
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2016-10-31 23:40:46 +01:00 |
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f4exb
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004cbcb060
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Tx ph.2: UpChannelizer: use order 64 filter as longer orders do not improve image rejection
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2016-10-31 00:33:20 +01:00 |
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f4exb
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06b2c4930e
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IntHalBandFilter: added order 96
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2016-10-30 23:04:54 +01:00 |
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f4exb
|
f5bbbb7cab
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Tx ph.2: UpChannelizer: allow any sample rate
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2016-10-30 22:01:20 +01:00 |
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f4exb
|
91315913b4
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Tx ph.2: change UpChannelizer filter chain from std::list to std::vector
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2016-10-30 18:22:33 +01:00 |
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f4exb
|
31add4919d
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IntHalfbandFilter: corrected shift left factor for the Samples version of the FIR
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2016-10-30 12:50:06 +01:00 |
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f4exb
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fb2346aba8
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Added original half band FIR coefficients as comments
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2016-10-30 10:15:47 +01:00 |
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f4exb
|
4a001350d3
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Tx ph.2: Templatized IntHalfbandFilter and improved coefficients. Changed to order 80 for upsamplers and 48 for downsamplers
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2016-10-29 17:01:02 +02:00 |
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f4exb
|
4ab45f4768
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Tx ph.2: Fixed half-band interpolators and set the order to 64 (for all)
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2016-10-29 12:29:24 +02:00 |
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f4exb
|
e9f0bb0d45
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Tx ph.2: UpChannelizer: interpolator (1) draft
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2016-10-28 18:39:45 +02:00 |
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f4exb
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1f58b6ece7
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DV serial: removed useless parameter
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2016-10-28 09:09:19 +02:00 |
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f4exb
|
0305605bbc
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DV Serial: fall back multi slot support
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2016-10-28 08:37:27 +02:00 |
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f4exb
|
4d273d8a13
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Tx ph.2: use a specialized interpolator similar to the decimator derived from the ancient interpolator
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2016-10-28 03:18:24 +02:00 |
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f4exb
|
4618e007de
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Tx ph.2: restored ancient interpolator
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2016-10-27 18:05:40 +02:00 |
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f4exb
|
0fc6d95357
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Tx ph.1: fixed read pointer management when getting new samples
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2016-10-25 03:31:36 +02:00 |
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f4exb
|
ee55747c0b
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Tx ph.1: FileSink: set sample source FIFO size depending on sample rate
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2016-10-25 02:34:29 +02:00 |
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f4exb
|
5021d15162
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Tx ph.1: Connect sample source FIFO read signal with forwarding samples to spectrum sink
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2016-10-24 18:31:14 +02:00 |
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f4exb
|
289c1a203f
|
Tx ph.1: Sample source FIFO read with signal. Use a specific spectrum sink (vis) reference in Device sink engine for main spectrum rendering
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2016-10-24 18:06:44 +02:00 |
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f4exb
|
9f1b801d1a
|
Tx ph.1: fixed AM modulator
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2016-10-24 01:27:23 +02:00 |
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f4exb
|
8f70840561
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Tx ph.1: fixed sample source FIFO
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2016-10-23 23:27:19 +02:00 |
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f4exb
|
4e446b9c7a
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Tx ph.1: fixed source sink initialization
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2016-10-23 14:14:32 +02:00 |
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f4exb
|
e42a717c69
|
Tx ph.1: Fixed sample rate and center frequency handling in File Sink
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2016-10-23 10:38:44 +02:00 |
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f4exb
|
119127fdab
|
Tx ph.1: Fixes to file sink GUI and some debug messages
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2016-10-23 02:22:00 +02:00 |
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f4exb
|
4b02072fe4
|
Tx ph.1: add Tx tab (2). Fixed core dump
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2016-10-22 05:07:48 +02:00 |
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f4exb
|
9fff2b8477
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Tx ph.1: new AM modulator plugin (3). Implemented actual modulation code.
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2016-10-20 19:34:30 +02:00 |
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f4exb
|
9f3fec7600
|
Tx ph.1: added device sinks list to DSP engine
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2016-10-19 14:29:23 +02:00 |
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f4exb
|
940cfbe94e
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DSPDeviceSourceEngine: stop threaded baseband sample sinks
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2016-10-17 22:40:02 +02:00 |
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f4exb
|
0f7ac00a71
|
Tx ph.1: Added the DSPDeviceSinkEngine class
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2016-10-17 18:15:08 +02:00 |
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f4exb
|
b56c2d9a2c
|
Tx ph.1: new classes (1)
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2016-10-17 08:58:49 +02:00 |
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f4exb
|
52b618469c
|
Tx ph.1: refactored source sample FIFO. StarUML model: added Tx classes
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2016-10-15 09:53:06 +02:00 |
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f4exb
|
4709ba9e01
|
TX ph.1: Baseband sample sources and Device sample sinks (1)
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2016-10-14 18:47:19 +02:00 |
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f4exb
|
9303a63931
|
DV Serial: prepare multi slot (4)
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2016-10-12 00:53:26 +02:00 |
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f4exb
|
01c901a8fe
|
DV Serial: prepare multi slot (3)
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2016-10-12 00:19:44 +02:00 |
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f4exb
|
413ba162c7
|
DV Serial: prepare multi slot (2)
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2016-10-12 00:02:36 +02:00 |
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f4exb
|
20c5ec3f76
|
DV Serial: removed useless parameter
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2016-10-11 23:54:27 +02:00 |
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f4exb
|
2caf76b746
|
DV Serial: prepare multi slot (1)
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2016-10-11 23:51:18 +02:00 |
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f4exb
|
18a8e7c903
|
DV Serial: implement FIFO slots
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2016-10-11 22:52:45 +02:00 |
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f4exb
|
13e832a20e
|
DV serial: alternate timeout handling. Primitives to get information about worker status
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2016-10-11 20:24:08 +02:00 |
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f4exb
|
6b2e09ed10
|
RxTx semantic move: updated attributes and method names. Removed obsolete methods
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2016-10-11 01:11:32 +02:00 |
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f4exb
|
aa45dcbd17
|
Add an interpolate method to the Interpolator class
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2016-10-10 02:08:48 +02:00 |
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f4exb
|
6707bab1a5
|
Give the decimation method of the Interpolator class its proper name
|
2016-10-10 01:53:32 +02:00 |
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