There can be few cases of ESD where CTL_START is cleared but
wr_ptr interrupt does not come. Signaling retire fence in these
cases to avoid freeze and dangling pending_retire_fence_cnt.
Change-Id: I167f69dce5cbe43b4771e5056d8a73bd7587e76e
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Move the rotator irq registration from probe to first commit, as the
irq is available only after bind on the mdss master device.
The late bind is causing rotator driver to get defered multiple times
and on some occasions rotator probe is not called as its stuck in
the deferred probe list.
Change-Id: Ieff99b31c42d2c9cbc0a4097de7afc9f1b29df77
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.
Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change updates mandatory wb property to
optional as few low tier targets do not have wb
hardware block.
Change-Id: I39e6bf80a527dff95905e0a204401185e9e7bc03
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
BW_INDICATION indication must be programed before BWI_THRESHOLD.
Otherwise, it will revert to legacy behaviour and rsc wakeup is
delayed by one vsync causing janks. In current code BW_INDICATION
is done after LM/SSPP programming and plane fence wait. Moved the
perf_crtc_update before this and just after ctl prepare configuration
to avoid chances of BW_INDICATION crossing BWI_THRESHOLD time.
Change-Id: Ie976720910c34aaf140f1ce7daef38ba20bc10f5
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Update rotator ot limits as per QOS recommendation.
Change-Id: I852155902149dc2518b78144658b96f9ee8b4b4d
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Use platform independent API for cpu number which
compiles on both 32 and 64 bit machine.
Change-Id: I539de278776623a84067460569a2b99676a2ba4e
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
In clk enable failure case, pickup only enabled clks
and disable them during unwind process.
Change-Id: I004cf71a8ee567d56a1cd7f8f3d2f39ffb58fd61
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Update the DSC initial line calculations to use logical
or operator instead of bitwise operator. Additionally
this change takes care of removing unnecessary brackets.
Change-Id: Ie7fd099e726f0dbed012d5406860300a48d9b2eb
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This change renames the splash region memory node name
to align the node with the advanced bootloader naming
convention.
Change-Id: Idfd666b5e32e5f22ccb677f68155621adfe87a14
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Separate the horizontal and vertical max downscale checks
as pre-downscale introduced different limits on different
axes. Also cleanup the variable names for max downscale
limit when pre-downscale is not enabled.
Change-Id: If01aac1844d0bd5133502a50dbc38197e11da5d5
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Reduce the cyclomatic complexity for this function by splitting
the work in to helpers and using the new sde_dt_props method of
device node parsing.
Change-Id: Id4a41225bd78f06ee353a636d17330ba41daf1ff
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change moves the msm_driver power resource initialization from
bind time to probe time. This keeps the resource vote on until all the
devices are bound. This is required since the regulator and clock
sync_state driver will remove the proxy votes as soon as msm_driver
has probed.
Change-Id: Icb0e59e4ff0290ef0c1bd3914d6fdbf99bf5d9fa
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Avoid updating the rsc state to solver mode for video mode panels
on targets with rsc version 3 and up.
Change-Id: I238f130c914c8c845c172746cc2025acd37840d3
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Now that inline rotation is enabled and offline rotator is no
longer supported, remove offline rotator's AXI2 NRT port from
the RSCC power-collapse sequence.
Change-Id: Ib7e6637a1bcb44b4c1707208ca84c57aa875aa92
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Power handle's interconnect interface assumes all interconnects
contain a reg bus entry, but RSC does not require one. Change
the logic to only report interconnect failure if the reg bus
node exists in the device node.
Change-Id: Ia4b1cfd1c482a9674b6a29d07483e801ac20a67c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
When switching from CMD to VIDEO or vice-versa, HW no longer
requires a vsync wait in between since the vsyncs will be
synchronized. So skip the wait for HW which supports this
feature.
Change-Id: Ia5823495bc7bfc7d590098775b0a5f4b4347b5ed
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Add support for enabling and reading profiling counters via
debugfs. This change also introduces RSC rev 4 (first rev
supporting profiling counters), enabling all relevant rev 3
features as well.
Change-Id: I0326215b069a37c91072965379b0b4843916ee0a
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds support for programming SPR hw block as per the
client configuration from the respective color property blob.
Currently only reg dma accelerated path is provided.
Change-Id: Ib8559ec2c392be7b69ca43c6364e701fab877a28
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Currently driver clients are not setting the last value of the igc
table. As a temporary change setting it to 4095, once user-space changes
are updated will revert the current fix.
Change-Id: Ifd6e62cd9edf3d1f2917079f639e00aa4ea31cf1
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Previous SB DMA logic was not clearing a "SB DMA active" flag, resulting
in SB DMA incorrectly being flushed every frame. While this logic
matches the DB DMA approach, it is unnecessary and could result in
delayed DB DMA execution.
Update SB DMA logic to clear the "active" flag for the target DSPP
immediately after the SB DMA is flushed.
Change-Id: I3dc0792a50d7dec42cb32bf8cd1e3d0b217cf582
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Gamut registers have been updated in newer version of dpu where the
bit depth of the registers have been updated. Change programs
the values by adjusting for bit depth changes.
Change-Id: Id8d8dc37aff6854d67855b9aa7644d1ca4ec4e6f
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
DSI controller and clock will be disabled/enabled during panel mode
switch, so disallow backlight update during panel mode switch to
avoiding DSI exception.
Change-Id: I37e2f3c9aa929555593ffb53950521150ee7698f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Make sure that cmd dma done mask is set before sending
dma commands. This will make sure that we don't timeout
if the refcnt's are not properly handled. Many oem's
have their own customizations around this which maynot
handle the refcnt's correctly.
Change-Id: If7f5ed1fae20b57f6e9147cae2caa3c5097466c9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For command mode panels, if a dynamic mode switch occurs on
the first frame, the current code skips DSI controller initialization
and registering for error handlers. This causes the software state
to be uninitialized for DSI CTRL, resulting in command transfer
failures and eventual crash. The change ensures that initialization
is complete even if the DMS occurs on first frame.
Change-Id: I83e3336f7c09424b6c7b95826c30b37974ec29ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add this change to ensure that DFPS and RFI happen in the
same panel mode for avoiding unexpected panel mode switch.
Change-Id: I6783b320e73a88e8f75cb83bcce85e50f798b6ab
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
